From: Paul Burton Date: Sun, 13 Aug 2017 04:36:28 +0000 (-0700) Subject: irqchip: mips-gic: Remove GIC_CPU_INT* macros X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3ee50dcbef374651056ea42d5eb543bbacb3ff41;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git irqchip: mips-gic: Remove GIC_CPU_INT* macros The GIC_CPU_INT* macros are never used. Remove the dead code. Signed-off-by: Paul Burton Acked-by: Marc Zyngier Cc: Jason Cooper Cc: Thomas Gleixner Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17038/ Signed-off-by: Ralf Baechle --- diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h index 9546947d1842..e93aaf529baa 100644 --- a/include/linux/irqchip/mips-gic.h +++ b/include/linux/irqchip/mips-gic.h @@ -21,14 +21,6 @@ #define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000 #define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004 -/* GIC nomenclature for Core Interrupt Pins. */ -#define GIC_CPU_INT0 0 /* Core Interrupt 2 */ -#define GIC_CPU_INT1 1 /* . */ -#define GIC_CPU_INT2 2 /* . */ -#define GIC_CPU_INT3 3 /* . */ -#define GIC_CPU_INT4 4 /* . */ -#define GIC_CPU_INT5 5 /* Core Interrupt 7 */ - /* Add 2 to convert GIC CPU pin to core interrupt */ #define GIC_CPU_PIN_OFFSET 2