From: Ayoung Sim Date: Mon, 18 Jun 2018 08:33:51 +0000 (+0900) Subject: [COMMON] media: mfc: DRV4.0: update prefix [10BIT] X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3e1a694de65af35f4d525ae242205355b84a6d51;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [COMMON] media: mfc: DRV4.0: update prefix [10BIT] Change-Id: Ie43c401e9eae1ef9a03a4bee0b826a287d7d934e Signed-off-by: Ayoung Sim --- diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_buf.c b/drivers/media/platform/exynos/mfc/s5p_mfc_buf.c index 22ed207bb4ac..8d963db2e946 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_buf.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_buf.c @@ -337,7 +337,7 @@ static void mfc_calc_enc_codec_buffer_size(struct s5p_mfc_ctx *ctx) ALIGN(ENC_VP9_LUMA_DPB_10B_SIZE(ctx->crop_width, ctx->crop_height), 64); enc->chroma_dpb_size = ALIGN(ENC_VP9_CHROMA_DPB_10B_SIZE(ctx->crop_width, ctx->crop_height), 64); - mfc_debug(2, "VP9 10bit recon luma size: %zu chroma size: %zu\n", + mfc_debug(2, "[10BIT] VP9 10bit or 422 recon luma size: %zu chroma size: %zu\n", enc->luma_dpb_size, enc->chroma_dpb_size); } enc->me_buffer_size = @@ -356,7 +356,7 @@ static void mfc_calc_enc_codec_buffer_size(struct s5p_mfc_ctx *ctx) ALIGN(ENC_HEVC_LUMA_DPB_10B_SIZE(ctx->crop_width, ctx->crop_height), 64); enc->chroma_dpb_size = ALIGN(ENC_HEVC_CHROMA_DPB_10B_SIZE(ctx->crop_width, ctx->crop_height), 64); - mfc_debug(2, "HEVC 10bit or 422 recon luma size: %zu chroma size: %zu\n", + mfc_debug(2, "[10BIT] HEVC 10bit or 422 recon luma size: %zu chroma size: %zu\n", enc->luma_dpb_size, enc->chroma_dpb_size); } enc->me_buffer_size = diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_enc.c b/drivers/media/platform/exynos/mfc/s5p_mfc_enc.c index 8b413c80b117..a07a5071e45f 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_enc.c @@ -260,7 +260,7 @@ static void mfc_enc_check_format(struct s5p_mfc_ctx *ctx) case V4L2_PIX_FMT_NV61M_S10B: case V4L2_PIX_FMT_NV16M_P210: case V4L2_PIX_FMT_NV61M_P210: - mfc_debug(2, "is 422 and 10bit format\n"); + mfc_debug(2, "[10BIT] is 422 and 10bit format\n"); ctx->is_10bit = 1; ctx->is_422 = 1; break; @@ -274,7 +274,7 @@ static void mfc_enc_check_format(struct s5p_mfc_ctx *ctx) case V4L2_PIX_FMT_NV12M_P010: case V4L2_PIX_FMT_NV21M_S10B: case V4L2_PIX_FMT_NV21M_P010: - mfc_debug(2, "is 10bit format\n"); + mfc_debug(2, "[10BIT] is 10bit format\n"); ctx->is_10bit = 1; ctx->is_422 = 0; break; diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_param.c b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_param.c index faa1f65550df..bcf6fde88ba6 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_param.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_param.c @@ -950,7 +950,7 @@ void s5p_mfc_set_enc_params_vp9(struct s5p_mfc_ctx *ctx) if (ctx->is_10bit) { if ((p_vp9->vp9_version != S5P_FIMV_E_PROFILE_VP9_PROFILE2) && (p_vp9->vp9_version != S5P_FIMV_E_PROFILE_VP9_PROFILE3)) { - mfc_err_ctx("10bit format is not matched with profile(%d)\n", + mfc_err_ctx("[10BIT] format is not matched with profile(%d)\n", p_vp9->vp9_version); } } @@ -1125,7 +1125,7 @@ void s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx) if ((p_hevc->profile != S5P_FIMV_E_PROFILE_HEVC_MAIN_422_10_INTRA) && (p_hevc->profile != S5P_FIMV_E_PROFILE_HEVC_MAIN_10) && (p_hevc->profile != S5P_FIMV_E_PROFILE_HEVC_MAIN_422_10)) { - mfc_err_ctx("10bit format is not matched with profile(%d)\n", + mfc_err_ctx("[10BIT] format is not matched with profile(%d)\n", p_hevc->profile); } } diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_irq.c b/drivers/media/platform/exynos/mfc/s5p_mfc_irq.c index 6e5e452ac64a..5b004101020f 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_irq.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_irq.c @@ -1064,7 +1064,7 @@ static int mfc_handle_seq_dec(struct s5p_mfc_ctx *ctx) s5p_mfc_get_chroma_bit_depth_minus8() || s5p_mfc_get_profile() == S5P_FIMV_D_PROFILE_HEVC_MAIN_10) { ctx->is_10bit = 1; - mfc_info_ctx("10bit contents, profile: %d, depth: %d/%d\n", + mfc_info_ctx("[10BIT] 10bit contents, profile: %d, depth: %d/%d\n", s5p_mfc_get_profile(), s5p_mfc_get_luma_bit_depth_minus8() + 8, s5p_mfc_get_chroma_bit_depth_minus8() + 8); diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c b/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c index a812e8382e80..07feb9b5d42a 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_reg.c @@ -192,7 +192,7 @@ int s5p_mfc_set_dec_codec_buffers(struct s5p_mfc_ctx *ctx) for (i = 0; i < ctx->raw_buf.num_planes; i++) { MFC_WRITEL(raw->stride_2bits[i], S5P_FIMV_D_FIRST_PLANE_2BIT_DPB_STRIDE_SIZE + (i * 4)); MFC_WRITEL(raw->plane_size_2bits[i], S5P_FIMV_D_FIRST_PLANE_2BIT_DPB_SIZE + (i * 4)); - mfc_debug(2, "# HEVC 10bit : 2bits plane%d.size = %d, stride = %d\n", i, + mfc_debug(2, "[10BIT] : 2bits plane%d.size = %d, stride = %d\n", i, ctx->raw_buf.plane_size_2bits[i], ctx->raw_buf.stride_2bits[i]); } } diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_utils.c b/drivers/media/platform/exynos/mfc/s5p_mfc_utils.c index 4a014a6bc47a..2db6a2c2b564 100644 --- a/drivers/media/platform/exynos/mfc/s5p_mfc_utils.c +++ b/drivers/media/platform/exynos/mfc/s5p_mfc_utils.c @@ -294,7 +294,7 @@ void s5p_mfc_dec_calc_dpb_size(struct s5p_mfc_ctx *ctx) if (ctx->is_10bit) { for (i = 0; i < raw->num_planes; i++) { raw->total_plane_size += raw->plane_size_2bits[i]; - mfc_debug(2, "Plane[%d] 2bit size = %d, stride = %d\n", + mfc_debug(2, "[10BIT] Plane[%d] 2bit size = %d, stride = %d\n", i, raw->plane_size_2bits[i], raw->stride_2bits[i]); } @@ -396,7 +396,7 @@ void s5p_mfc_enc_calc_src_size(struct s5p_mfc_ctx *ctx) if (ctx->is_10bit) { for (i = 0; i < raw->num_planes; i++) { raw->total_plane_size += raw->plane_size_2bits[i]; - mfc_debug(2, "Plane[%d] 2bit size = %d, stride = %d\n", + mfc_debug(2, "[10BIT] Plane[%d] 2bit size = %d, stride = %d\n", i, raw->plane_size_2bits[i], raw->stride_2bits[i]); }