From: David S. Miller <davem@davemloft.net>
Date: Tue, 10 Mar 2015 03:38:02 +0000 (-0400)
Subject: Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3cef5c5b0b56f3f90b0e9ff8d3f8dc57f464cc14;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git

Merge git://git./linux/kernel/git/davem/net

Conflicts:
	drivers/net/ethernet/cadence/macb.c

Overlapping changes in macb driver, mostly fixes and cleanups
in 'net' overlapping with the integration of at91_ether into
macb in 'net-next'.

Signed-off-by: David S. Miller <davem@davemloft.net>
---

3cef5c5b0b56f3f90b0e9ff8d3f8dc57f464cc14
diff --cc drivers/net/ethernet/cadence/macb.c
index a4c5462c071a,81d41539fcba..f032e2a245b0
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@@ -2131,8 -2147,24 +2131,24 @@@ static const struct net_device_ops macb
   */
  static void macb_configure_caps(struct macb *bp)
  {
 -	u32 dcfg;
+ 	const struct of_device_id *match;
+ 	const struct macb_config *config;
 +	u32 dcfg;
  
+ 	if (bp->pdev->dev.of_node) {
+ 		match = of_match_node(macb_dt_ids, bp->pdev->dev.of_node);
+ 		if (match && match->data) {
+ 			config = match->data;
+ 
+ 			bp->caps = config->caps;
+ 			/*
+ 			 * As we have access to the matching node, configure
+ 			 * DMA burst length as well
+ 			 */
+ 			bp->dma_burst_length = config->dma_burst_length;
+ 		}
+ 	}
+ 
  	if (MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2)
  		bp->caps |= MACB_CAPS_MACB_IS_GEM;
  
@@@ -2294,433 -2366,12 +2310,433 @@@ static int macb_init(struct platform_de
  		dev->hw_features &= ~NETIF_F_SG;
  	dev->features = dev->hw_features;
  
 +	val = 0;
 +	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
 +		val = GEM_BIT(RGMII);
 +	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
 +		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
 +		val = MACB_BIT(RMII);
 +	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
 +		val = MACB_BIT(MII);
 +
 +	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
 +		val |= MACB_BIT(CLKEN);
 +
 +	macb_or_gem_writel(bp, USRIO, val);
 +
 +	/* setup capacities */
 +	macb_configure_caps(bp);
 +
  	/* Set MII management clock divider */
 -	config = macb_mdc_clk_div(bp);
 -	config |= macb_dbw(bp);
 -	macb_writel(bp, NCFGR, config);
 +	val = macb_mdc_clk_div(bp);
 +	val |= macb_dbw(bp);
 +	macb_writel(bp, NCFGR, val);
 +
 +	return 0;
 +
 +err_disable_tx_clk:
 +	clk_disable_unprepare(bp->tx_clk);
 +
 +err_disable_hclk:
 +	clk_disable_unprepare(bp->hclk);
 +
 +err_disable_pclk:
 +	clk_disable_unprepare(bp->pclk);
 +
 +	return err;
 +}
 +
 +#if defined(CONFIG_OF)
 +/* 1518 rounded up */
 +#define AT91ETHER_MAX_RBUFF_SZ	0x600
 +/* max number of receive buffers */
 +#define AT91ETHER_MAX_RX_DESCR	9
 +
 +/* Initialize and start the Receiver and Transmit subsystems */
 +static int at91ether_start(struct net_device *dev)
 +{
 +	struct macb *lp = netdev_priv(dev);
 +	dma_addr_t addr;
 +	u32 ctl;
 +	int i;
 +
 +	lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
 +					 (AT91ETHER_MAX_RX_DESCR *
 +					  sizeof(struct macb_dma_desc)),
 +					 &lp->rx_ring_dma, GFP_KERNEL);
 +	if (!lp->rx_ring)
 +		return -ENOMEM;
 +
 +	lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev,
 +					    AT91ETHER_MAX_RX_DESCR *
 +					    AT91ETHER_MAX_RBUFF_SZ,
 +					    &lp->rx_buffers_dma, GFP_KERNEL);
 +	if (!lp->rx_buffers) {
 +		dma_free_coherent(&lp->pdev->dev,
 +				  AT91ETHER_MAX_RX_DESCR *
 +				  sizeof(struct macb_dma_desc),
 +				  lp->rx_ring, lp->rx_ring_dma);
 +		lp->rx_ring = NULL;
 +		return -ENOMEM;
 +	}
 +
 +	addr = lp->rx_buffers_dma;
 +	for (i = 0; i < AT91ETHER_MAX_RX_DESCR; i++) {
 +		lp->rx_ring[i].addr = addr;
 +		lp->rx_ring[i].ctrl = 0;
 +		addr += AT91ETHER_MAX_RBUFF_SZ;
 +	}
 +
 +	/* Set the Wrap bit on the last descriptor */
 +	lp->rx_ring[AT91ETHER_MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP);
 +
 +	/* Reset buffer index */
 +	lp->rx_tail = 0;
 +
 +	/* Program address of descriptor list in Rx Buffer Queue register */
 +	macb_writel(lp, RBQP, lp->rx_ring_dma);
 +
 +	/* Enable Receive and Transmit */
 +	ctl = macb_readl(lp, NCR);
 +	macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE));
 +
 +	return 0;
 +}
 +
 +/* Open the ethernet interface */
 +static int at91ether_open(struct net_device *dev)
 +{
 +	struct macb *lp = netdev_priv(dev);
 +	u32 ctl;
 +	int ret;
 +
 +	/* Clear internal statistics */
 +	ctl = macb_readl(lp, NCR);
 +	macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT));
 +
 +	macb_set_hwaddr(lp);
 +
 +	ret = at91ether_start(dev);
 +	if (ret)
 +		return ret;
 +
 +	/* Enable MAC interrupts */
 +	macb_writel(lp, IER, MACB_BIT(RCOMP)	|
 +			     MACB_BIT(RXUBR)	|
 +			     MACB_BIT(ISR_TUND)	|
 +			     MACB_BIT(ISR_RLE)	|
 +			     MACB_BIT(TCOMP)	|
 +			     MACB_BIT(ISR_ROVR)	|
 +			     MACB_BIT(HRESP));
 +
 +	/* schedule a link state check */
 +	phy_start(lp->phy_dev);
 +
 +	netif_start_queue(dev);
 +
 +	return 0;
 +}
 +
 +/* Close the interface */
 +static int at91ether_close(struct net_device *dev)
 +{
 +	struct macb *lp = netdev_priv(dev);
 +	u32 ctl;
 +
 +	/* Disable Receiver and Transmitter */
 +	ctl = macb_readl(lp, NCR);
 +	macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
 +
 +	/* Disable MAC interrupts */
 +	macb_writel(lp, IDR, MACB_BIT(RCOMP)	|
 +			     MACB_BIT(RXUBR)	|
 +			     MACB_BIT(ISR_TUND)	|
 +			     MACB_BIT(ISR_RLE)	|
 +			     MACB_BIT(TCOMP)	|
 +			     MACB_BIT(ISR_ROVR) |
 +			     MACB_BIT(HRESP));
 +
 +	netif_stop_queue(dev);
 +
 +	dma_free_coherent(&lp->pdev->dev,
 +			  AT91ETHER_MAX_RX_DESCR *
 +			  sizeof(struct macb_dma_desc),
 +			  lp->rx_ring, lp->rx_ring_dma);
 +	lp->rx_ring = NULL;
 +
 +	dma_free_coherent(&lp->pdev->dev,
 +			  AT91ETHER_MAX_RX_DESCR * AT91ETHER_MAX_RBUFF_SZ,
 +			  lp->rx_buffers, lp->rx_buffers_dma);
 +	lp->rx_buffers = NULL;
 +
 +	return 0;
 +}
 +
 +/* Transmit packet */
 +static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
 +{
 +	struct macb *lp = netdev_priv(dev);
 +
 +	if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) {
 +		netif_stop_queue(dev);
 +
 +		/* Store packet information (to free when Tx completed) */
 +		lp->skb = skb;
 +		lp->skb_length = skb->len;
 +		lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len,
 +							DMA_TO_DEVICE);
 +
 +		/* Set address of the data in the Transmit Address register */
 +		macb_writel(lp, TAR, lp->skb_physaddr);
 +		/* Set length of the packet in the Transmit Control register */
 +		macb_writel(lp, TCR, skb->len);
  
 -	mac = of_get_mac_address(pdev->dev.of_node);
 +	} else {
 +		netdev_err(dev, "%s called, but device is busy!\n", __func__);
 +		return NETDEV_TX_BUSY;
 +	}
 +
 +	return NETDEV_TX_OK;
 +}
 +
 +/* Extract received frame from buffer descriptors and sent to upper layers.
 + * (Called from interrupt context)
 + */
 +static void at91ether_rx(struct net_device *dev)
 +{
 +	struct macb *lp = netdev_priv(dev);
 +	unsigned char *p_recv;
 +	struct sk_buff *skb;
 +	unsigned int pktlen;
 +
 +	while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) {
 +		p_recv = lp->rx_buffers + lp->rx_tail * AT91ETHER_MAX_RBUFF_SZ;
 +		pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl);
 +		skb = netdev_alloc_skb(dev, pktlen + 2);
 +		if (skb) {
 +			skb_reserve(skb, 2);
 +			memcpy(skb_put(skb, pktlen), p_recv, pktlen);
 +
 +			skb->protocol = eth_type_trans(skb, dev);
 +			lp->stats.rx_packets++;
 +			lp->stats.rx_bytes += pktlen;
 +			netif_rx(skb);
 +		} else {
 +			lp->stats.rx_dropped++;
 +		}
 +
 +		if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH))
 +			lp->stats.multicast++;
 +
 +		/* reset ownership bit */
 +		lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED);
 +
 +		/* wrap after last buffer */
 +		if (lp->rx_tail == AT91ETHER_MAX_RX_DESCR - 1)
 +			lp->rx_tail = 0;
 +		else
 +			lp->rx_tail++;
 +	}
 +}
 +
 +/* MAC interrupt handler */
 +static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
 +{
 +	struct net_device *dev = dev_id;
 +	struct macb *lp = netdev_priv(dev);
 +	u32 intstatus, ctl;
 +
 +	/* MAC Interrupt Status register indicates what interrupts are pending.
 +	 * It is automatically cleared once read.
 +	 */
 +	intstatus = macb_readl(lp, ISR);
 +
 +	/* Receive complete */
 +	if (intstatus & MACB_BIT(RCOMP))
 +		at91ether_rx(dev);
 +
 +	/* Transmit complete */
 +	if (intstatus & MACB_BIT(TCOMP)) {
 +		/* The TCOM bit is set even if the transmission failed */
 +		if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE)))
 +			lp->stats.tx_errors++;
 +
 +		if (lp->skb) {
 +			dev_kfree_skb_irq(lp->skb);
 +			lp->skb = NULL;
 +			dma_unmap_single(NULL, lp->skb_physaddr,
 +					 lp->skb_length, DMA_TO_DEVICE);
 +			lp->stats.tx_packets++;
 +			lp->stats.tx_bytes += lp->skb_length;
 +		}
 +		netif_wake_queue(dev);
 +	}
 +
 +	/* Work-around for EMAC Errata section 41.3.1 */
 +	if (intstatus & MACB_BIT(RXUBR)) {
 +		ctl = macb_readl(lp, NCR);
 +		macb_writel(lp, NCR, ctl & ~MACB_BIT(RE));
 +		macb_writel(lp, NCR, ctl | MACB_BIT(RE));
 +	}
 +
 +	if (intstatus & MACB_BIT(ISR_ROVR))
 +		netdev_err(dev, "ROVR error\n");
 +
 +	return IRQ_HANDLED;
 +}
 +
 +#ifdef CONFIG_NET_POLL_CONTROLLER
 +static void at91ether_poll_controller(struct net_device *dev)
 +{
 +	unsigned long flags;
 +
 +	local_irq_save(flags);
 +	at91ether_interrupt(dev->irq, dev);
 +	local_irq_restore(flags);
 +}
 +#endif
 +
 +static const struct net_device_ops at91ether_netdev_ops = {
 +	.ndo_open		= at91ether_open,
 +	.ndo_stop		= at91ether_close,
 +	.ndo_start_xmit		= at91ether_start_xmit,
 +	.ndo_get_stats		= macb_get_stats,
 +	.ndo_set_rx_mode	= macb_set_rx_mode,
 +	.ndo_set_mac_address	= eth_mac_addr,
 +	.ndo_do_ioctl		= macb_ioctl,
 +	.ndo_validate_addr	= eth_validate_addr,
 +	.ndo_change_mtu		= eth_change_mtu,
 +#ifdef CONFIG_NET_POLL_CONTROLLER
 +	.ndo_poll_controller	= at91ether_poll_controller,
 +#endif
 +};
 +
 +static int at91ether_init(struct platform_device *pdev)
 +{
 +	struct net_device *dev = platform_get_drvdata(pdev);
 +	struct macb *bp = netdev_priv(dev);
 +	int err;
 +	u32 reg;
 +
 +	bp->pclk = devm_clk_get(&pdev->dev, "ether_clk");
 +	if (IS_ERR(bp->pclk))
 +		return PTR_ERR(bp->pclk);
 +
 +	err = clk_prepare_enable(bp->pclk);
 +	if (err) {
 +		dev_err(&pdev->dev, "failed to enable pclk (%u)\n", err);
 +		return err;
 +	}
 +
 +	dev->netdev_ops = &at91ether_netdev_ops;
 +	dev->ethtool_ops = &macb_ethtool_ops;
 +
 +	err = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt,
 +			       0, dev->name, dev);
 +	if (err)
 +		goto err_disable_clk;
 +
 +	macb_writel(bp, NCR, 0);
 +
 +	reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG);
 +	if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
 +		reg |= MACB_BIT(RM9200_RMII);
 +
 +	macb_writel(bp, NCFGR, reg);
 +
 +	return 0;
 +
 +err_disable_clk:
 +	clk_disable_unprepare(bp->pclk);
 +
 +	return err;
 +}
 +
- static struct macb_config at91sam9260_config = {
++static const struct macb_config at91sam9260_config = {
 +	.caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII,
 +	.init = macb_init,
 +};
 +
- static struct macb_config pc302gem_config = {
++static const struct macb_config pc302gem_config = {
 +	.caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
 +	.dma_burst_length = 16,
 +	.init = macb_init,
 +};
 +
- static struct macb_config sama5d3_config = {
++static const struct macb_config sama5d3_config = {
 +	.caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
 +	.dma_burst_length = 16,
 +	.init = macb_init,
 +};
 +
- static struct macb_config sama5d4_config = {
++static const struct macb_config sama5d4_config = {
 +	.caps = 0,
 +	.dma_burst_length = 4,
 +	.init = macb_init,
 +};
 +
- static struct macb_config emac_config = {
++static const struct macb_config emac_config = {
 +	.init = at91ether_init,
 +};
 +
 +static const struct of_device_id macb_dt_ids[] = {
 +	{ .compatible = "cdns,at32ap7000-macb" },
 +	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
 +	{ .compatible = "cdns,macb" },
 +	{ .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
 +	{ .compatible = "cdns,gem", .data = &pc302gem_config },
 +	{ .compatible = "atmel,sama5d3-gem", .data = &sama5d3_config },
 +	{ .compatible = "atmel,sama5d4-gem", .data = &sama5d4_config },
 +	{ .compatible = "cdns,at91rm9200-emac", .data = &emac_config },
 +	{ .compatible = "cdns,emac", .data = &emac_config },
 +	{ /* sentinel */ }
 +};
 +MODULE_DEVICE_TABLE(of, macb_dt_ids);
 +#endif /* CONFIG_OF */
 +
 +static int macb_probe(struct platform_device *pdev)
 +{
 +	int (*init)(struct platform_device *) = macb_init;
 +	struct device_node *np = pdev->dev.of_node;
 +	const struct macb_config *macb_config = NULL;
 +	unsigned int queue_mask, num_queues;
 +	struct macb_platform_data *pdata;
 +	struct phy_device *phydev;
 +	struct net_device *dev;
 +	struct resource *regs;
 +	void __iomem *mem;
 +	const char *mac;
 +	struct macb *bp;
 +	int err;
 +
 +	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 +	mem = devm_ioremap_resource(&pdev->dev, regs);
 +	if (IS_ERR(mem))
 +		return PTR_ERR(mem);
 +
 +	macb_probe_queues(mem, &queue_mask, &num_queues);
 +	dev = alloc_etherdev_mq(sizeof(*bp), num_queues);
 +	if (!dev)
 +		return -ENOMEM;
 +
 +	dev->base_addr = regs->start;
 +
 +	SET_NETDEV_DEV(dev, &pdev->dev);
 +
 +	bp = netdev_priv(dev);
 +	bp->pdev = pdev;
 +	bp->dev = dev;
 +	bp->regs = mem;
 +	bp->num_queues = num_queues;
 +	spin_lock_init(&bp->lock);
 +
 +	platform_set_drvdata(pdev, dev);
 +
 +	dev->irq = platform_get_irq(pdev, 0);
 +	if (dev->irq < 0)
 +		return dev->irq;
 +
 +	mac = of_get_mac_address(np);
  	if (mac)
  		memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
  	else
diff --cc net/netfilter/nft_compat.c
index 29fbcf25f88f,213584cf04b3..0b0fd4e36294
--- a/net/netfilter/nft_compat.c
+++ b/net/netfilter/nft_compat.c
@@@ -139,11 -137,9 +139,11 @@@ nft_target_set_tgchk_param(struct xt_tg
  		entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
  		break;
  	case NFPROTO_BRIDGE:
- 		entry->ebt.ethproto = proto;
+ 		entry->ebt.ethproto = (__force __be16)proto;
  		entry->ebt.invflags = inv ? EBT_IPROTO : 0;
  		break;
 +	case NFPROTO_ARP:
 +		break;
  	}
  	par->entryinfo	= entry;
  	par->target	= target;
@@@ -352,11 -348,9 +352,11 @@@ nft_match_set_mtchk_param(struct xt_mtc
  		entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
  		break;
  	case NFPROTO_BRIDGE:
- 		entry->ebt.ethproto = proto;
+ 		entry->ebt.ethproto = (__force __be16)proto;
  		entry->ebt.invflags = inv ? EBT_IPROTO : 0;
  		break;
 +	case NFPROTO_ARP:
 +		break;
  	}
  	par->entryinfo	= entry;
  	par->match	= match;