From: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Date: Tue, 8 Apr 2014 10:16:53 +0000 (+0530)
Subject: drm/i915/skl: SKL pipe misc programming
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3cdf122ccfd150e022247c2709c0737b9fb235f1;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/i915/skl: SKL pipe misc programming

Pipe misc programming in gen9 is similar to BDW. Extending the BDW
implementation to gen 9.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 40f73fc4ce65..901c035514ac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7064,7 +7064,7 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
 	I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 	POSTING_READ(GAMMA_MODE(intel_crtc->pipe));
 
-	if (IS_BROADWELL(dev)) {
+	if (IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) {
 		val = 0;
 
 		switch (intel_crtc->config.pipe_bpp) {