From: Imre Deak <imre.deak@intel.com>
Date: Thu, 25 Jul 2013 13:22:31 +0000 (+0300)
Subject: drm/i915: dvo_ch7xxx: fix vsync polarity setting
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3b27af3560f3cfe4e09171024515fa304ebae93b;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git

drm/i915: dvo_ch7xxx: fix vsync polarity setting

This fixes a typo which set the wrong vsync and possibly also hsync
polarity for any modes with positive vsync polarity.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index 757e0fa11043..af42e94f6846 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -307,7 +307,7 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
 		idf |= CH7xxx_IDF_HSP;
 
 	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
-		idf |= CH7xxx_IDF_HSP;
+		idf |= CH7xxx_IDF_VSP;
 
 	ch7xxx_writeb(dvo, CH7xxx_IDF, idf);
 }