From: Matthias Seidel Date: Wed, 7 Sep 2016 15:45:30 +0000 (+0200) Subject: spi: dw: round up result of calculation for clock divider X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3aef463222eaf1ca505629e93a0b64e4040a4472;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git spi: dw: round up result of calculation for clock divider Avoid ending up with a higher frequency than requested Signed-off-by: Matthias Seidel Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index c85e4b327a4a..27960e46135d 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -300,7 +300,7 @@ static int dw_spi_transfer_one(struct spi_master *master, if (transfer->speed_hz != dws->current_freq) { if (transfer->speed_hz != chip->speed_hz) { /* clk_div doesn't support odd number */ - chip->clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe; + chip->clk_div = (DIV_ROUND_UP(dws->max_freq, transfer->speed_hz) + 1) & 0xfffe; chip->speed_hz = transfer->speed_hz; } dws->current_freq = transfer->speed_hz;