From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Fri, 25 Nov 2011 15:32:20 +0000 (+0200)
Subject: OMAPDSS: APPLY: add dss_set_go_bits()
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3ab15b2aa70369e0360f12e35e47bca1a269138b;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git

OMAPDSS: APPLY: add dss_set_go_bits()

Currently dss_write_regs() implicitely sets the GO bits for all managers
with shadow dirty flags set. This is a bit misleading, as one does not
presume "write registers" function to also set the GO bit.

Thus this patch splits the setting of GO bits into a separate function,
dss_set_go_bits, which is used after writing the registers.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---

diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c
index e2eaed2e9172..f54c17f849b7 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -715,16 +715,35 @@ static void dss_write_regs(void)
 		}
 
 		dss_mgr_write_regs(mgr);
+	}
+}
 
-		if (need_go(mgr)) {
-			mp->busy = true;
+static void dss_set_go_bits(void)
+{
+	const int num_mgrs = omap_dss_get_num_overlay_managers();
+	int i;
 
-			if (!dss_data.irq_enabled && need_isr())
-				dss_register_vsync_isr();
+	for (i = 0; i < num_mgrs; ++i) {
+		struct omap_overlay_manager *mgr;
+		struct mgr_priv_data *mp;
 
-			dispc_mgr_go(mgr->id);
-		}
+		mgr = omap_dss_get_overlay_manager(i);
+		mp = get_mgr_priv(mgr);
+
+		if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
+			continue;
+
+		if (!need_go(mgr))
+			continue;
+
+		mp->busy = true;
+
+		if (!dss_data.irq_enabled && need_isr())
+			dss_register_vsync_isr();
+
+		dispc_mgr_go(mgr->id);
 	}
+
 }
 
 void dss_mgr_start_update(struct omap_overlay_manager *mgr)
@@ -848,6 +867,7 @@ static void dss_apply_irq_handler(void *data, u32 mask)
 	}
 
 	dss_write_regs();
+	dss_set_go_bits();
 
 	extra_updating = extra_info_update_ongoing();
 	if (!extra_updating)
@@ -912,6 +932,7 @@ int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
 	omap_dss_mgr_apply_mgr(mgr);
 
 	dss_write_regs();
+	dss_set_go_bits();
 
 	spin_unlock_irqrestore(&data_lock, flags);
 
@@ -1016,6 +1037,7 @@ int dss_mgr_enable(struct omap_overlay_manager *mgr)
 	dss_mgr_setup_fifos(mgr);
 
 	dss_write_regs();
+	dss_set_go_bits();
 
 	if (!mgr_manual_update(mgr))
 		mp->updating = true;
@@ -1392,6 +1414,7 @@ int dss_ovl_enable(struct omap_overlay *ovl)
 	dss_ovl_setup_fifo(ovl);
 
 	dss_write_regs();
+	dss_set_go_bits();
 
 	spin_unlock_irqrestore(&data_lock, flags);
 
@@ -1426,8 +1449,8 @@ int dss_ovl_disable(struct omap_overlay *ovl)
 	spin_lock_irqsave(&data_lock, flags);
 
 	dss_apply_ovl_enable(ovl, false);
-
 	dss_write_regs();
+	dss_set_go_bits();
 
 	spin_unlock_irqrestore(&data_lock, flags);