From: Stefan Schmidt <stefan@datenfreihafen.org>
Date: Wed, 9 Jul 2008 07:07:29 +0000 (+0100)
Subject: [ARM] 5163/1: pxa27x_udc: Allow choosing the bits in UP2OCR_SEOS
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=390d452fa1d912b6e76744a34777d7390ab1fa1c;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

[ARM] 5163/1: pxa27x_udc: Allow choosing the bits in UP2OCR_SEOS

Allow choosing the bits in UP2OCR_SEOS.

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h
index bc1cf7d0773a..ab1443f8bd89 100644
--- a/include/asm-arm/arch-pxa/pxa27x-udc.h
+++ b/include/asm-arm/arch-pxa/pxa27x-udc.h
@@ -97,7 +97,7 @@
 #define UP2OCR_IDON		(1 << 10)	/* OTG ID Read Enable */
 #define UP2OCR_HXS		(1 << 16)	/* Host Port 2 Transceiver Output Select */
 #define UP2OCR_HXOE		(1 << 17)	/* Host Port 2 Transceiver Output Enable */
-#define UP2OCR_SEOS		(1 << 24)	/* Single-Ended Output Select */
+#define UP2OCR_SEOS(x)		((x & 7) << 24)	/* Single-Ended Output Select */
 
 #define UDCCSN(x)	__REG2(0x40600100, (x) << 2)
 #define UDCCSR0         __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */