From: Sugar Zhang Date: Tue, 24 May 2016 03:47:46 +0000 (+0800) Subject: ASoC: rockchip: i2s: rename I2S_CKR_TRCM_TX/RXSHARE to I2S_CKR_TRCM_TX/RXONLY X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=359d9abdc208c662d8c9ff2966a7c6014124f715;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git ASoC: rockchip: i2s: rename I2S_CKR_TRCM_TX/RXSHARE to I2S_CKR_TRCM_TX/RXONLY this patch make it more reasonable and readable, because when we chose I2S_CKR_TRCM_TXONLY, we only output clk_lrck_tx, and hardware need to confirm this signal is wired to external codec lrck_tx/rx at the same time. for convenience, we just handle lrck_txonly if we enable symmetric_rates in driver and dai_link. otherwise, we use the separate lrck_tx/rx. Signed-off-by: Sugar Zhang Signed-off-by: Xing Zheng Signed-off-by: Mark Brown --- diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 2f290f3a0ac7..652e8c5ea166 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -339,8 +339,8 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, I2S_DMACR_RDL(16)); val = I2S_CKR_TRCM_TXRX; - if (dai->driver->symmetric_rates || rtd->dai_link->symmetric_rates) - val = I2S_CKR_TRCM_TXSHARE; + if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates) + val = I2S_CKR_TRCM_TXONLY; regmap_update_bits(i2s->regmap, I2S_CKR, I2S_CKR_TRCM_MASK, diff --git a/sound/soc/rockchip/rockchip_i2s.h b/sound/soc/rockchip/rockchip_i2s.h index 8e239d301bc7..31f11fd25393 100644 --- a/sound/soc/rockchip/rockchip_i2s.h +++ b/sound/soc/rockchip/rockchip_i2s.h @@ -81,8 +81,8 @@ #define I2S_CKR_TRCM_SHIFT 28 #define I2S_CKR_TRCM(x) (x << I2S_CKR_TRCM_SHIFT) #define I2S_CKR_TRCM_TXRX (0 << I2S_CKR_TRCM_SHIFT) -#define I2S_CKR_TRCM_TXSHARE (1 << I2S_CKR_TRCM_SHIFT) -#define I2S_CKR_TRCM_RXSHARE (2 << I2S_CKR_TRCM_SHIFT) +#define I2S_CKR_TRCM_TXONLY (1 << I2S_CKR_TRCM_SHIFT) +#define I2S_CKR_TRCM_RXONLY (2 << I2S_CKR_TRCM_SHIFT) #define I2S_CKR_TRCM_MASK (3 << I2S_CKR_TRCM_SHIFT) #define I2S_CKR_MSS_SHIFT 27 #define I2S_CKR_MSS_MASTER (0 << I2S_CKR_MSS_SHIFT)