From: Mark Brown Date: Mon, 4 Apr 2011 08:55:42 +0000 (+0900) Subject: ASoC: Fix comment width in soc-cache.c X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=34bad69cf63efc761b05f603d99e121b83635c08;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git ASoC: Fix comment width in soc-cache.c Lines should be less than 80 columns. Signed-off-by: Mark Brown --- diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c index ed67c160724f..f46a198a48c0 100644 --- a/sound/soc/soc-cache.c +++ b/sound/soc/soc-cache.c @@ -393,10 +393,11 @@ static int snd_soc_16_16_spi_write(void *control_data, const char *data, #define snd_soc_16_16_spi_write NULL #endif -/* Primitive bulk write support for soc-cache. The data pointed to by `data' needs - * to already be in the form the hardware expects including any leading register specific - * data. Any data written through this function will not go through the cache as it - * only handles writing to volatile or out of bounds registers. +/* Primitive bulk write support for soc-cache. The data pointed to by + * `data' needs to already be in the form the hardware expects + * including any leading register specific data. Any data written + * through this function will not go through the cache as it only + * handles writing to volatile or out of bounds registers. */ static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg, const void *data, size_t len)