From: Paulo Zanoni Date: Thu, 1 Nov 2012 20:45:04 +0000 (-0200) Subject: drm/i915: set the correct number of FDI lanes on Haswell X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=349d7e5d7b27ee7b0b596ef1047e5c63908597fa;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: set the correct number of FDI lanes on Haswell We had 2 places using X2 and one place using X1. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 67bd6ba64a35..a7a555f766eb 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -171,7 +171,7 @@ void hsw_fdi_link_train(struct drm_crtc *crtc) I915_WRITE(DDI_BUF_CTL(PORT_E), temp | DDI_BUF_CTL_ENABLE | - DDI_PORT_WIDTH_X2 | + ((intel_crtc->fdi_lanes - 1) << 1) | hsw_ddi_buf_ctl_values[i]); udelay(600); @@ -193,7 +193,7 @@ void hsw_fdi_link_train(struct drm_crtc *crtc) FDI_RX_ENABLE | FDI_LINK_TRAIN_PATTERN_1_CPT | FDI_RX_ENHANCE_FRAME_ENABLE | - FDI_PORT_WIDTH_2X_LPT | + ((intel_crtc->fdi_lanes - 1) << 19) | FDI_RX_PLL_ENABLE); POSTING_READ(reg); udelay(100); @@ -952,6 +952,7 @@ void intel_ddi_enable_pipe_func(struct drm_crtc *crtc) } else if (type == INTEL_OUTPUT_ANALOG) { temp |= TRANS_DDI_MODE_SELECT_FDI; + temp |= (intel_crtc->fdi_lanes - 1) << 1; } else if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {