From: Will Deacon Date: Fri, 7 Jul 2017 16:01:50 +0000 (+0100) Subject: arm64: atomics: Remove '&' from '+&' asm constraint in lse atomics X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=32fb5d73c98b079e7c815b62e9d88a39ff8ce509;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git arm64: atomics: Remove '&' from '+&' asm constraint in lse atomics The lse implementation of atomic64_dec_if_positive uses the '+&' constraint, but the '&' is redundant and confusing in this case, since early clobber on a read/write operand is a strange concept. Replace the constraint with '+'. Signed-off-by: Will Deacon --- diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h index 99fa69c9c3cf..9ef0797380cb 100644 --- a/arch/arm64/include/asm/atomic_lse.h +++ b/arch/arm64/include/asm/atomic_lse.h @@ -435,7 +435,7 @@ static inline long atomic64_dec_if_positive(atomic64_t *v) " sub x30, x30, %[ret]\n" " cbnz x30, 1b\n" "2:") - : [ret] "+&r" (x0), [v] "+Q" (v->counter) + : [ret] "+r" (x0), [v] "+Q" (v->counter) : : __LL_SC_CLOBBERS, "cc", "memory");