From: Dave Airlie Date: Wed, 7 Aug 2013 08:09:03 +0000 (+1000) Subject: Merge tag 'drm-intel-next-2013-07-26-fixed' of git://people.freedesktop.org/~danvet... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=32c913e4369ce7bd1d16a9b6983f7b8975c13f5a;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git Merge tag 'drm-intel-next-2013-07-26-fixed' of git://people.freedesktop.org/~danvet/drm-intel into drm-next Neat that QA (and Ben) keeps on humming along while I'm on vacation, so you already get the next feature pull request: - proper eLLC support for HSW from Ben - more interrupt refactoring - add w/a tags where we implement them already (Damien) - hangcheck fixes (Chris) + hangcheck stats (Mika) - flesh out the new vm structs for ppgtt and ggtt (Ben) - PSR for Haswell, still disabled by default (Rodrigo et al.) - pc8+ refclock sequence code from Paulo - more interrupt refactoring from Paulo, unifying ilk/snb with the ivb/hsw interrupt code - full solution for the Haswell concurrent reg access issues (Chris) - fix racy object accounting, used by some new leak tests - fix sync polarity settings on ch7xxx dvo encoder - random bits&pieces, little fixes and better debug output all over [airlied: fix conflict with drm_mm cleanups] * tag 'drm-intel-next-2013-07-26-fixed' of git://people.freedesktop.org/~danvet/drm-intel: (289 commits) drm/i915: Do not dereference NULL crtc or fb until after checking drm/i915: fix pnv display core clock readout out drm/i915: Replace open-coded offset_in_page() drm/i915: Retry DP aux_ch communications with a different clock after failure drm/i915: Add messages useful for HPD storm detection debugging (v2) drm/i915: dvo_ch7xxx: fix vsync polarity setting drm/i915: fix the racy object accounting drm/i915: Convert the register access tracepoint to be conditional drm/i915: Squash gen lookup through multiple indirections inside GT access drm/i915: Use the common register access functions for NOTRACE variants drm/i915: Use a private interface for register access within GT drm/i915: Colocate all GT access routines in the same file drm/i915: fix reference counting in i915_gem_create drm/i915: Use Graphics Base of Stolen Memory on all gen3+ drm/i915: disable stolen mem for OVERLAY_NEEDS_PHYSICAL drm/i915: add functions to disable and restore LCPLL drm/i915: disable CLKOUT_DP when it's not needed drm/i915: extend lpt_enable_clkout_dp drm/i915: fix up error cleanup in i915_gem_object_bind_to_gtt drm/i915: Add some debug breadcrumbs to connector detection ... --- 32c913e4369ce7bd1d16a9b6983f7b8975c13f5a diff --cc drivers/gpu/drm/i915/i915_gem.c index ea2d83d7324e,35d17fb1b89b..26c5f802a9df --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@@ -3081,12 -3119,17 +3106,18 @@@ i915_gem_object_bind_to_gtt(struct drm_ i915_gem_object_pin_pages(obj); + vma = i915_gem_vma_create(obj, &dev_priv->gtt.base); + if (IS_ERR(vma)) { + ret = PTR_ERR(vma); + goto err_unpin; + } + search_free: - ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space, - &obj->gtt_space, + ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm, + &vma->node, size, alignment, - obj->cache_level, 0, gtt_max); + obj->cache_level, 0, gtt_max, + DRM_MM_SEARCH_DEFAULT); if (ret) { ret = i915_gem_evict_something(dev, size, alignment, obj->cache_level, diff --cc drivers/gpu/drm/i915/i915_gem_stolen.c index a3d1a125b5e0,4bbde2ae1819..38afadf5eaf6 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c @@@ -432,7 -405,8 +422,9 @@@ i915_gem_object_create_stolen_for_preal return obj; - unref_out: + err_out: - drm_mm_put_block(stolen); ++ drm_mm_remove_node(stolen); ++ kfree(stolen); drm_gem_object_unreference(&obj->base); return NULL; }