From: H. Peter Anvin Date: Tue, 13 Feb 2007 12:26:24 +0000 (+0100) Subject: [PATCH] i386: All Transmeta CPUs have constant TSCs X-Git-Tag: MMI-PSA29.97-13-9~45208^2~28 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=30b82ea08c3365a6fc916250ff2ad634717fc81b;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git [PATCH] i386: All Transmeta CPUs have constant TSCs All Transmeta CPUs ever produced have constant-rate TSCs. Signed-off-by: H. Peter Anvin Signed-off-by: Andi Kleen Cc: Andi Kleen Signed-off-by: Andrew Morton --- diff --git a/arch/i386/kernel/cpu/transmeta.c b/arch/i386/kernel/cpu/transmeta.c index 4056fb7d2cdf..b536e810d27e 100644 --- a/arch/i386/kernel/cpu/transmeta.c +++ b/arch/i386/kernel/cpu/transmeta.c @@ -72,6 +72,9 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c) wrmsr(0x80860004, ~0, uk); c->x86_capability[0] = cpuid_edx(0x00000001); wrmsr(0x80860004, cap_mask, uk); + + /* All Transmeta CPUs have a constant TSC */ + set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); /* If we can run i686 user-space code, call us an i686 */ #define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV)