From: Ramesh Shanmugasundaram Date: Mon, 29 Feb 2016 14:22:39 +0000 (+0000) Subject: arm64: dts: r8a7795: Add CAN support X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=308b7e4ba62e2ab60efcaf426cc219d591f0cd28;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git arm64: dts: r8a7795: Add CAN support Adds CAN controller nodes for r8a7795. Note: CAN channel register base address mentioned in R-Car Gen3 Hardware User Manual v0.5E is incorrect. The corrected base addresses are: CAN Channel 0 - 0xe6c30000 CAN Channel 1 - 0xe6c38000 Signed-off-by: Ramesh Shanmugasundaram Signed-off-by: Simon Horman --- diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 4049182e6608..a88f8d840c48 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -523,6 +523,36 @@ #size-cells = <0>; }; + can0: can@e6c30000 { + compatible = "renesas,can-r8a7795", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c30000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A7795_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&cpg>; + status = "disabled"; + }; + + can1: can@e6c38000 { + compatible = "renesas,can-r8a7795", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c38000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A7795_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&cpg>; + status = "disabled"; + }; + hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",