From: Tom St Denis <tom.stdenis@amd.com>
Date: Mon, 26 Feb 2018 14:09:26 +0000 (-0500)
Subject: drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=30310d4077157bd05bdad6712d69f08f318a3739;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/amd/amdgpu: Correct VRAM width for APUs with GMC9

[ Upstream commit 585b7f161c85bd5ca675b97580faf21c506541e3 ]

DDR4 has a 64-bit width not 128-bits.  It was reporting
twice the width.  Tested with my Ryzen 2400G.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6dc0f6e346e7..a1d71429fb72 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -456,7 +456,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 	adev->mc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
 	if (!adev->mc.vram_width) {
 		/* hbm memory channel size */
-		chansize = 128;
+		if (adev->flags & AMD_IS_APU)
+			chansize = 64;
+		else
+			chansize = 128;
 
 		tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
 		tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;