From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Thu, 12 Mar 2015 15:10:33 +0000 (+0200)
Subject: drm/i915: Hide the source vs. sink rate handling from intel_dp_compute_config()
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=2ecae76ad6c6da042dbbcce0084bd6b6c5700845;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/i915: Hide the source vs. sink rate handling from intel_dp_compute_config()

intel_dp_compute_config() only really needs to know the rates supported
by both source and sink, so hide the raw source and sink arrays from it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7553f08d87e1..45c35681eb48 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1195,9 +1195,9 @@ intel_dp_set_clock(struct intel_encoder *encoder,
 	}
 }
 
-static int intel_supported_rates(const int *source_rates, int source_len,
-				 const int *sink_rates, int sink_len,
-				 int *supported_rates)
+static int intersect_rates(const int *source_rates, int source_len,
+			   const int *sink_rates, int sink_len,
+			   int *supported_rates)
 {
 	int i = 0, j = 0, k = 0;
 
@@ -1216,6 +1216,21 @@ static int intel_supported_rates(const int *source_rates, int source_len,
 	return k;
 }
 
+static int intel_supported_rates(struct intel_dp *intel_dp,
+				 int *supported_rates)
+{
+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
+	const int *source_rates, *sink_rates;
+	int source_len, sink_len;
+
+	sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
+	source_len = intel_dp_source_rates(dev, &source_rates);
+
+	return intersect_rates(source_rates, source_len,
+			       sink_rates, sink_len,
+			       supported_rates);
+}
+
 static int rate_to_index(int find, const int *rates)
 {
 	int i = 0;
@@ -1246,17 +1261,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	int max_clock;
 	int bpp, mode_rate;
 	int link_avail, link_clock;
-	const int *sink_rates;
-	int supported_rates[8] = {0};
-	const int *source_rates;
-	int source_len, sink_len, supported_len;
-
-	sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
-
-	source_len = intel_dp_source_rates(dev, &source_rates);
+	int supported_rates[DP_MAX_SUPPORTED_RATES] = {};
+	int supported_len;
 
-	supported_len = intel_supported_rates(source_rates, source_len,
-				sink_rates, sink_len, supported_rates);
+	supported_len = intel_supported_rates(intel_dp, supported_rates);
 
 	/* No common link rates between source and sink */
 	WARN_ON(supported_len <= 0);
@@ -1355,7 +1363,8 @@ found:
 
 	if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0]) {
 		intel_dp->rate_select =
-			rate_to_index(supported_rates[clock], sink_rates);
+			rate_to_index(supported_rates[clock],
+				      intel_dp->supported_rates);
 		intel_dp->link_bw = 0;
 	}