From: Arnd Bergmann Date: Fri, 23 Jun 2006 18:57:50 +0000 (+0200) Subject: [POWERPC] spufs: fix class0 interrupt assignment X-Git-Tag: MMI-PSA29.97-13-9~48728^2~20 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=2cd90bc8fba8720ef7f3fdfd1e0c1a5397a18271;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git [POWERPC] spufs: fix class0 interrupt assignment The class zero interrupt handling for spus was confusing alignment and error interrupts, so swap them. Signed-off-by: Arnd Bergmann Signed-off-by: Paul Mackerras --- diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index db82f503ba2c..b306723abb87 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -168,12 +168,12 @@ spu_irq_class_0_bottom(struct spu *spu) stat &= mask; - if (stat & 1) /* invalid MFC DMA */ - __spu_trap_invalid_dma(spu); - - if (stat & 2) /* invalid DMA alignment */ + if (stat & 1) /* invalid DMA alignment */ __spu_trap_dma_align(spu); + if (stat & 2) /* invalid MFC DMA */ + __spu_trap_invalid_dma(spu); + if (stat & 4) /* error on SPU */ __spu_trap_error(spu);