From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 25 Sep 2008 14:39:20 +0000 (+0100)
Subject: [ARM] Print details relevant to how we handle the cache
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=2b4ae1f1d2ae595ff2fc5597287881796e0e6bfc;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

[ARM] Print details relevant to how we handle the cache

This replaces the original cache type decoding printks.  We now
indicate how we're treating the cache which we found, rather
than what we found.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 5b121d81f9eb..2f5d3641f2ed 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -248,6 +248,15 @@ static void __init cacheid_init(void)
 	} else {
 		cacheid = CACHEID_VIVT;
 	}
+
+	printk("CPU: %s data cache, %s instruction cache\n",
+		cache_is_vivt() ? "VIVT" :
+		cache_is_vipt_aliasing() ? "VIPT aliasing" :
+		cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
+		cache_is_vivt() ? "VIVT" :
+		icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
+		cache_is_vipt_aliasing() ? "VIPT aliasing" :
+		cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
 }
 
 /*