From: Geert Uytterhoeven Date: Thu, 30 Apr 2015 16:21:30 +0000 (+0200) Subject: serial: sh-sci: Replace hardcoded values in SCxSR_*_CLEAR macros X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=2922598cd913dc1a3fc0d2e77463075b80ea769f;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git serial: sh-sci: Replace hardcoded values in SCxSR_*_CLEAR macros Add the missing overrun error bit in SCxSR on SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721. Document what the corresponding bit(s) on plain SCIF are used for. Sort the components of SCIF_DEFAULT_ERROR_MASK by reverse definition order. Replace the hardcoded values in the SCxSR_*_CLEAR macros by proper defines. Use bit masks (negations of sets of bits) to make it more obvious which bits are being cleared. Assembler output (on sh) was compared before and after this commit: - For the first branch of the big "#if defined(...) || ..." construct, the code has changed slightly, as 32-bit bitmasks can be loaded in a single instruction, unlike the old large 16-bit constants (the SCxSR register is 16 bit, so we don't care about the top 16 bits), - For the second branch, the generated code is identical. Signed-off-by: Geert Uytterhoeven Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index 5282738375ae..3939513b0454 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h @@ -50,10 +50,16 @@ enum { #define SCI_FER BIT(4) /* Framing Error */ #define SCI_PER BIT(3) /* Parity Error */ #define SCI_TEND BIT(2) /* Transmit End */ +#define SCI_RESERVED 0x03 /* All reserved bits */ #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) -/* SCxSR (Serial Status Register) on SCIF, HSCIF */ +#define SCI_RDxF_CLEAR ~(SCI_RESERVED | SCI_RDRF) +#define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) +#define SCI_TDxE_CLEAR ~(SCI_RESERVED | SCI_TEND | SCI_TDRE) +#define SCI_BREAK_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) + +/* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */ #define SCIF_ER BIT(7) /* Receive Error */ #define SCIF_TEND BIT(6) /* Transmission End */ #define SCIF_TDFE BIT(5) /* Transmit FIFO Data Empty */ @@ -62,8 +68,18 @@ enum { #define SCIF_PER BIT(2) /* Parity Error */ #define SCIF_RDF BIT(1) /* Receive FIFO Data Full */ #define SCIF_DR BIT(0) /* Receive Data Ready */ +/* SCIF only (optional) */ +#define SCIF_PERC 0xf000 /* Number of Parity Errors */ +#define SCIF_FERC 0x0f00 /* Number of Framing Errors */ +/*SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 only */ +#define SCIFA_ORER BIT(9) /* Overrun Error */ + +#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_BRK | SCIF_ER) -#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) +#define SCIF_RDxF_CLEAR ~(SCIF_DR | SCIF_RDF) +#define SCIF_ERROR_CLEAR ~(SCIFA_ORER | SCIF_PER | SCIF_FER | SCIF_ER) +#define SCIF_TDxE_CLEAR ~(SCIF_TDFE) +#define SCIF_BREAK_CLEAR ~(SCIF_PER | SCIF_FER | SCIF_BRK) /* SCFCR (FIFO Control Register) */ #define SCFCR_MCE BIT(3) /* Modem Control Enable */ @@ -106,14 +122,22 @@ enum { defined(CONFIG_ARCH_SH73A0) || \ defined(CONFIG_ARCH_R8A7740) -# define SCxSR_RDxF_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfffc) -# define SCxSR_ERROR_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfd73) -# define SCxSR_TDxE_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffdf) -# define SCxSR_BREAK_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffe3) +# define SCxSR_RDxF_CLEAR(port) \ + (serial_port_in(port, SCxSR) & SCIF_RDxF_CLEAR) +# define SCxSR_ERROR_CLEAR(port) \ + (serial_port_in(port, SCxSR) & SCIF_ERROR_CLEAR) +# define SCxSR_TDxE_CLEAR(port) \ + (serial_port_in(port, SCxSR) & SCIF_TDxE_CLEAR) +# define SCxSR_BREAK_CLEAR(port) \ + (serial_port_in(port, SCxSR) & SCIF_BREAK_CLEAR) #else -# define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc) -# define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073) -# define SCxSR_TDxE_CLEAR(port) (((port)->type == PORT_SCI) ? 0x78 : 0x00df) -# define SCxSR_BREAK_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x00e3) +# define SCxSR_RDxF_CLEAR(port) \ + ((((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR) & 0xff) +# define SCxSR_ERROR_CLEAR(port) \ + ((((port)->type == PORT_SCI) ? SCI_ERROR_CLEAR : SCIF_ERROR_CLEAR) & 0xff) +# define SCxSR_TDxE_CLEAR(port) \ + ((((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR) & 0xff) +# define SCxSR_BREAK_CLEAR(port) \ + ((((port)->type == PORT_SCI) ? SCI_BREAK_CLEAR : SCIF_BREAK_CLEAR) & 0xff) #endif