From: Romain Izard Date: Fri, 10 Feb 2017 15:24:46 +0000 (+0100) Subject: atmel_serial: Use the fractional divider when possible X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=2867af2dcf4093d5617172c030ff449e5d5c5935;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git atmel_serial: Use the fractional divider when possible The fractional baud rate generator is available when using the asynchronous mode of Atmel USART controllers. It makes it possible to use higher baudrates, in exchange for a less precise clock with a variable duty cycle. The existing code restricts its use to the normal mode of the USART controller, following the recommendation from the datasheet for the first chip embedding this type of controller. This recommendation has been removed from the documentation for the newer chips. After verification, all revisions of this controller should be able to use the fractional baud rate generator with the different asynchronous modes. Removing the condition on ATMEL_US_USMODE makes it possible to get correct baudrates at high speed in more cases. This was tested with a board using an Atmel SAMA5D2 chip and a TI WL1831 WiFi/Bluetooth combo chip at 3 Mbauds, with hardware flow control enabled. Signed-off-by: Romain Izard Acked-by: Ludovic Desroches Signed-off-by: Richard Genoud Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 8d2cec0f03c2..dcebb28ffbc4 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -1769,7 +1769,9 @@ static void atmel_get_ip_name(struct uart_port *port) /* * Only USART devices from at91sam9260 SOC implement fractional - * baudrate. + * baudrate. It is available for all asynchronous modes, with the + * following restriction: the sampling clock's duty cycle is not + * constant. */ atmel_port->has_frac_baudrate = false; atmel_port->has_hw_timer = false; @@ -2213,8 +2215,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, * then * 8 CD + FP = selected clock / (2 * baudrate) */ - if (atmel_port->has_frac_baudrate && - (mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_NORMAL) { + if (atmel_port->has_frac_baudrate) { div = DIV_ROUND_CLOSEST(port->uartclk, baud * 2); cd = div >> 3; fp = div & ATMEL_US_FP_MASK;