From: Benjamin Herrenschmidt Date: Thu, 4 Sep 2014 07:50:17 +0000 (+1000) Subject: drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx() X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=261a3ad42605f5824072d1410d3c5f7b93f7cad8;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx() If the P2A has been used to target other SOC registers before that call, we're going to hit the wrong place so make sure we set the base address up properly before using it. (P2A stands for PCIe to AHB bridge and is the bride that allows accessing the AST's internal AHB bus using a relocatable 64k window in the second half of the PCIe MMIO BAR) Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Dave Airlie --- diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c index 5da4b62285fa..7e2ddde474e3 100644 --- a/drivers/gpu/drm/ast/ast_dp501.c +++ b/drivers/gpu/drm/ast/ast_dp501.c @@ -400,7 +400,18 @@ void ast_init_3rdtx(struct drm_device *dev) if (ast->tx_chip_type == AST_TX_SIL164) ast_init_dvo(dev); else { + /* + * Set DAC source to VGA mode in SCU2C via the P2A + * bridge. First configure the P2U to target the SCU + * in case it isn't at this stage. + */ + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + /* Then unlock the SCU with the magic password */ ast_write32(ast, 0x12000, 0x1688a8a8); + ast_write32(ast, 0x12000, 0x1688a8a8); + ast_write32(ast, 0x12000, 0x1688a8a8); + /* Finally, clear bits [17:16] of SCU2c */ data = ast_read32(ast, 0x1202c); data &= 0xfffcffff; ast_write32(ast, 0, data);