From: Oskar Schirmer <oskar@linutronix.de>
Date: Thu, 17 Feb 2011 15:43:00 +0000 (+0100)
Subject: arm: tcc8k: Avoid reading clock register twice
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=25d7a6003b5c76b735fdfc3dc5030d9d9c93844e;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

arm: tcc8k: Avoid reading clock register twice

There is no reason why in case of PLL2 the configuration register
should be read twice, while for PLL0/1 using the value previously read
is used. Do the same for PLL2.

Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---

diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
index 7ebcbff4652a..a25e3fcb716f 100644
--- a/arch/arm/mach-tcc8k/clock.c
+++ b/arch/arm/mach-tcc8k/clock.c
@@ -199,7 +199,7 @@ static unsigned long get_rate_pll_div(int pll)
 		addr = CKC_BASE + CLKDIVC1_OFFS;
 		reg = __raw_readl(addr);
 		if (reg & CLKDIVC1_P2E)
-			div = __raw_readl(addr) & 0x3f;
+			div = reg & 0x3f;
 		break;
 	}
 	return get_rate_pll(pll) / (div + 1);