From: Arnd Bergmann Date: Sat, 7 Jan 2012 20:53:13 +0000 (+0000) Subject: Merge branch 'depends/rmk/for-linus' into next/soc X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=23c4c1c7b0dd2ebeb90bb6851478c0e80fe9e6b8;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git Merge branch 'depends/rmk/for-linus' into next/soc Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/common.c --- 23c4c1c7b0dd2ebeb90bb6851478c0e80fe9e6b8 diff --cc arch/arm/mach-omap2/board-ti8168evm.c index b236fcc023ac,74713e3993e5..1770b28d6522 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@@ -38,9 -38,15 +38,10 @@@ static void __init ti8168_evm_init(void MACHINE_START(TI8168EVM, "ti8168evm") /* Maintainer: Texas Instruments */ .atag_offset = 0x100, - .map_io = ti8168_evm_map_io, - .init_early = ti816x_init_early, - .init_irq = ti816x_init_irq, + .map_io = ti81xx_map_io, + .init_early = ti81xx_init_early, + .init_irq = ti81xx_init_irq, .timer = &omap3_timer, .init_machine = ti8168_evm_init, + .restart = omap_prcm_restart, MACHINE_END diff --cc arch/arm/mach-omap2/common.h index 4b2b416fafe1,cda888a2e635..9403b2ce6c85 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@@ -90,8 -82,9 +90,9 @@@ void omap35xx_init_early(void) void omap3630_init_early(void); void omap3_init_early(void); /* Do not use this one */ void am35xx_init_early(void); -void ti816x_init_early(void); +void ti81xx_init_early(void); void omap4430_init_early(void); + void omap_prcm_restart(char, const char *); /* * IO bases for various OMAP processors diff --cc arch/arm/mach-tegra/board-dt-tegra20.c index d1befbedbdea,000000000000..47e1fa322f15 mode 100644,000000..100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@@ -1,148 -1,0 +1,149 @@@ +/* + * nVidia Tegra device tree board support + * + * Copyright (C) 2010 Secret Lab Technologies, Ltd. + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "board.h" +#include "board-harmony.h" +#include "clock.h" +#include "devices.h" + +void harmony_pinmux_init(void); +void paz00_pinmux_init(void); +void seaboard_pinmux_init(void); +void trimslice_pinmux_init(void); +void ventana_pinmux_init(void); + +struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", + &tegra_ehci1_device.dev.platform_data), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", + &tegra_ehci2_device.dev.platform_data), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", + &tegra_ehci3_device.dev.platform_data), + {} +}; + +static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { + /* name parent rate enabled */ + { "uartd", "pll_p", 216000000, true }, + { "usbd", "clk_m", 12000000, false }, + { "usb2", "clk_m", 12000000, false }, + { "usb3", "clk_m", 12000000, false }, + { "pll_a", "pll_p_out1", 56448000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "cdev1", NULL, 0, true }, + { "i2s1", "pll_a_out0", 11289600, false}, + { "i2s2", "pll_a_out0", 11289600, false}, + { NULL, NULL, 0, 0}, +}; + +static struct of_device_id tegra_dt_match_table[] __initdata = { + { .compatible = "simple-bus", }, + {} +}; + +static struct { + char *machine; + void (*init)(void); +} pinmux_configs[] = { + { "compulab,trimslice", trimslice_pinmux_init }, + { "nvidia,harmony", harmony_pinmux_init }, + { "compal,paz00", paz00_pinmux_init }, + { "nvidia,seaboard", seaboard_pinmux_init }, + { "nvidia,ventana", ventana_pinmux_init }, +}; + +static void __init tegra_dt_init(void) +{ + int i; + + tegra_clk_init_from_table(tegra_dt_clk_init_table); + + /* + * Finished with the static registrations now; fill in the missing + * devices + */ + of_platform_populate(NULL, tegra_dt_match_table, + tegra20_auxdata_lookup, NULL); + + for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { + if (of_machine_is_compatible(pinmux_configs[i].machine)) { + pinmux_configs[i].init(); + break; + } + } + + WARN(i == ARRAY_SIZE(pinmux_configs), + "Unknown platform! Pinmuxing not initialized\n"); +} + +static const char *tegra20_dt_board_compat[] = { + "compulab,trimslice", + "nvidia,harmony", + "compal,paz00", + "nvidia,seaboard", + "nvidia,ventana", + NULL +}; + +DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") + .map_io = tegra_map_common_io, + .init_early = tegra20_init_early, + .init_irq = tegra_dt_init_irq, + .handle_irq = gic_handle_irq, + .timer = &tegra_timer, + .init_machine = tegra_dt_init, ++ .restart = tegra_assert_system_reset, + .dt_compat = tegra20_dt_board_compat, +MACHINE_END diff --cc arch/arm/mach-tegra/common.c index 72b666bd3043,20f396d740fa..a2eb90169aed --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@@ -33,28 -31,14 +33,26 @@@ #include "clock.h" #include "fuse.h" - void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset; - +#ifdef CONFIG_OF +static const struct of_device_id tegra_dt_irq_match[] __initconst = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, + { } +}; + +void __init tegra_dt_init_irq(void) +{ + tegra_init_irq(); + of_irq_init(tegra_dt_irq_match); +} +#endif + void tegra_assert_system_reset(char mode, const char *cmd) { - void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); + void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0); u32 reg; - /* use *_related to avoid spinlock since caches are off */ reg = readl_relaxed(reset); - reg |= 0x04; + reg |= 0x10; writel_relaxed(reg, reset); }