From: Chris Packham Date: Thu, 2 Mar 2017 22:42:39 +0000 (+1300) Subject: ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=23988bab04575261c74743b2828d624946cd3b57;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236 The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port 0.1 MEM" range was errantly kept when creating a specific dts for the SoC. Signed-off-by: Chris Packham Signed-off-by: Gregory CLEMENT --- diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index 3f3ec9e1f8af..84cc232a29e9 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -105,8 +105,7 @@ ranges = <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ - 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ - 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>; + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; pcie1: pcie@1,0 { device_type = "pci";