From: Michael Grzeschik Date: Tue, 31 Mar 2015 14:35:01 +0000 (+0200) Subject: spi: bitbang: only toggle bitchanges X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=232a5adc5199891efde6c844fd15b8d4d18245e6;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git spi: bitbang: only toggle bitchanges The current implementation of bitbang_txrx_be_cpha0 and bitbang_txrx_be_cpha1 always call setmosi. That runs into several unnecessary calls into the gpiolib when the level of the GPIO actually has not to be changed. This patch changes the routines to remember the last GPIO level and only calls setmosi if an change has to be made. This way it improves the transfer throughput. Signed-off-by: Michael Grzeschik Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h index c616e41521be..06b34e5bcfa3 100644 --- a/drivers/spi/spi-bitbang-txrx.h +++ b/drivers/spi/spi-bitbang-txrx.h @@ -49,12 +49,17 @@ bitbang_txrx_be_cpha0(struct spi_device *spi, { /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ + bool oldbit = !(word & 1); /* clock starts at inactive polarity */ for (word <<= (32 - bits); likely(bits); bits--) { /* setup MSB (to slave) on trailing edge */ - if ((flags & SPI_MASTER_NO_TX) == 0) - setmosi(spi, word & (1 << 31)); + if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((word & (1 << 31)) != oldbit) { + setmosi(spi, word & (1 << 31)); + oldbit = word & (1 << 31); + } + } spidelay(nsecs); /* T(setup) */ setsck(spi, !cpol); @@ -76,13 +81,18 @@ bitbang_txrx_be_cpha1(struct spi_device *spi, { /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ + bool oldbit = !(word & (1 << 31)); /* clock starts at inactive polarity */ for (word <<= (32 - bits); likely(bits); bits--) { /* setup MSB (to slave) on leading edge */ setsck(spi, !cpol); - if ((flags & SPI_MASTER_NO_TX) == 0) - setmosi(spi, word & (1 << 31)); + if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((word & (1 << 31)) != oldbit) { + setmosi(spi, word & (1 << 31)); + oldbit = word & (1 << 31); + } + } spidelay(nsecs); /* T(setup) */ setsck(spi, cpol);