From: Olof Johansson <olof@lixom.net>
Date: Mon, 19 Jun 2017 02:22:03 +0000 (-0700)
Subject: Merge tag 'v4.12-next-dts32' of https://github.com/mbgg/linux-mediatek into next/dt
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=226fe7c14d08de5f684f61af0b8de19ca68464ce;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge tag 'v4.12-next-dts32' of https://github.com/mbgg/linux-mediatek into next/dt

Add device tree nodes for
mt7623:
- clocks
- power domain
- pmic-wrapper
- pinctrl
- i2c
- spi
- nand
- mmc
- usb
- pwm
- ethernet
- crypto engine
- infared remote control
- audio controller
- ADC
- efuse
- thermal driver
- HW random generator

mt2701:
- NOR flash
- JPEG decoder
- i2c
- audio controller

* tag 'v4.12-next-dts32' of https://github.com/mbgg/linux-mediatek: (25 commits)
  arm: dts: mediatek: Add audio driver node for MT2701
  arm: dts: Add Mediatek MT2701 i2c device node
  arm: dts: mt2701: Add node for Mediatek JPEG Decoder
  arm: dts: mt2701: add nor flash node
  ARM: dts: mt2701: Add mtk-cirq node for mt2701
  arm: dts: mt7623: add Sean as one of authors for mt7623.dtsi files
  arm: dts: mt7623: add thermal nodes to the mt7623.dtsi file
  arm: dts: mt7623: add efuse nodes to the mt7623.dtsi file
  arm: dts: mt7623: add auxadc nodes to the mt7623.dtsi file
  arm: dts: mt7623: add rng nodes to the mt7623.dtsi file
  arm: dts: mt7623: add afe nodes to the mt7623.dtsi file
  arm: dts: mt7623: add ir nodes to the mt7623.dtsi file
  arm: dts: mt7623: add crypto engine nodes to the mt7623.dtsi file
  arm: dts: mt7623: add ethernet nodes to the mt7623.dtsi file
  arm: dts: mt7623: add pwm nodes to the mt7623.dtsi file
  arm: dts: mt7623: add usb nodes to the mt7623.dtsi file
  arm: dts: mt7623: add mmc nodes to the mt7623.dtsi file
  arm: dts: mt7623: add nand nodes to the mt7623.dtsi file
  arm: dts: mt7623: add spi nodes to the mt7623.dtsi file
  arm: dts: mt7623: add i2c nodes to the mt7623.dtsi file
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
---

226fe7c14d08de5f684f61af0b8de19ca68464ce
diff --cc arch/arm/boot/dts/mt7623.dtsi
index 3a9e9b6aea68,0d0cbeadc1d6..d81158b2b02f
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@@ -72,10 -81,67 +81,69 @@@
  			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
  			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
  			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 +		clock-frequency = <13000000>;
 +		arm,cpu-registers-not-fw-configured;
  	};
  
+ 	topckgen: syscon@10000000 {
+ 		compatible = "mediatek,mt7623-topckgen",
+ 			     "mediatek,mt2701-topckgen",
+ 			     "syscon";
+ 		reg = <0 0x10000000 0 0x1000>;
+ 		#clock-cells = <1>;
+ 	};
+ 
+ 	infracfg: syscon@10001000 {
+ 		compatible = "mediatek,mt7623-infracfg",
+ 			     "mediatek,mt2701-infracfg",
+ 			     "syscon";
+ 		reg = <0 0x10001000 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;
+ 	};
+ 
+ 	pericfg: syscon@10003000 {
+ 		compatible =  "mediatek,mt7623-pericfg",
+ 			      "mediatek,mt2701-pericfg",
+ 			      "syscon";
+ 		reg = <0 0x10003000 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;
+ 	};
+ 
+ 	pio: pinctrl@10005000 {
+ 		compatible = "mediatek,mt7623-pinctrl",
+ 			     "mediatek,mt2701-pinctrl";
+ 		reg = <0 0x1000b000 0 0x1000>;
+ 		mediatek,pctl-regmap = <&syscfg_pctl_a>;
+ 		pins-are-numbered;
+ 		gpio-controller;
+ 		#gpio-cells = <2>;
+ 		interrupt-controller;
+ 		interrupt-parent = <&gic>;
+ 		#interrupt-cells = <2>;
+ 		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ 			     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ 	};
+ 
+ 	syscfg_pctl_a: syscfg@10005000 {
+ 		compatible = "mediatek,mt7623-pctl-a-syscfg", "syscon";
+ 		reg = <0 0x10005000 0 0x1000>;
+ 	};
+ 
+ 	scpsys: scpsys@10006000 {
+ 		compatible = "mediatek,mt7623-scpsys",
+ 			     "mediatek,mt2701-scpsys",
+ 			     "syscon";
+ 		#power-domain-cells = <1>;
+ 		reg = <0 0x10006000 0 0x1000>;
+ 		infracfg = <&infracfg>;
+ 		clocks = <&topckgen CLK_TOP_MM_SEL>,
+ 			 <&topckgen CLK_TOP_MFG_SEL>,
+ 			 <&topckgen CLK_TOP_ETHIF_SEL>;
+ 		clock-names = "mm", "mfg", "ethif";
+ 	};
+ 
  	watchdog: watchdog@10007000 {
  		compatible = "mediatek,mt7623-wdt",
  			     "mediatek,mt6589-wdt";