From: Axel Lin Date: Tue, 15 Apr 2014 02:54:11 +0000 (+0800) Subject: platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check X-Git-Tag: MMI-PSA29.97-13-9~12097^2~16 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=21a3542753a63091bc4700525e6096d76fe32f62;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git platform-drivers-x86: intel_pmic_gpio: Fix off-by-one valid offset range check Only pin 0-7 support input, so the valid offset range should be 0 ~ 7. Signed-off-by: Axel Lin Signed-off-by: Matthew Garrett --- diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 2805988485f6..40929e4f7ad7 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c @@ -91,7 +91,7 @@ static void pmic_program_irqtype(int gpio, int type) static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { - if (offset > 8) { + if (offset >= 8) { pr_err("only pin 0-7 support input\n"); return -1;/* we only have 8 GPIO can use as input */ } @@ -130,7 +130,7 @@ static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset) int ret; /* we only have 8 GPIO pins we can use as input */ - if (offset > 8) + if (offset >= 8) return -EOPNOTSUPP; ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r); if (ret < 0)