From: Ben Dooks Date: Thu, 20 May 2010 11:25:59 +0000 (+0900) Subject: ARM: Merge for-2635-4/onenand X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=206a1a825dc67060ee319c99569755ba11250907;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ARM: Merge for-2635-4/onenand Merge branch 'for-2635-4/onenand' into for-2635-4/partial2 Conflicts: arch/arm/mach-s5pc100/cpu.c arch/arm/mach-s5pc100/include/mach/map.h arch/arm/mach-s5pv210/Makefile --- 206a1a825dc67060ee319c99569755ba11250907 diff --cc arch/arm/mach-s5pc100/cpu.c index d424a9fda034,cb37ffee05b2..816c4d4afef0 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c @@@ -38,8 -39,10 +38,10 @@@ #include #include #include -#include #include +#include + #include + #include /* Initial IO mappings */ diff --cc arch/arm/mach-s5pc100/include/mach/map.h index 88009549ab28,aba3bb4e3412..a0b2fee332a1 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h @@@ -14,49 -16,76 +14,77 @@@ #define __ASM_ARCH_MAP_H __FILE__ #include +#include + /* + * map-base.h has already defined virtual memory address + * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) + * S3C_VA_SYS S3C_ADDR(0x00100000) system control + * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) + * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block + * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog + * S3C_VA_UART S3C_ADDR(0x01000000) UART + * + * S5PC100 specific virtual memory address can be defined here + * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO + * + */ + + #define S5PC100_PA_ONENAND_BUF (0xB0000000) + #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) + + /* Chip ID */ ++ #define S5PC100_PA_CHIPID (0xE0000000) -#define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID -#define S5PC1XX_VA_CHIPID S3C_VA_SYS - -/* System */ -#define S5PC100_PA_CLK (0xE0100000) -#define S5PC100_PA_CLK_OTHER (0xE0200000) -#define S5PC100_PA_PWR (0xE0108000) -#define S5PC1XX_PA_CLK S5PC100_PA_CLK -#define S5PC1XX_PA_PWR S5PC100_PA_PWR -#define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER -#define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) -#define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) -#define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000) - -/* GPIO */ +#define S5P_PA_CHIPID S5PC100_PA_CHIPID + +#define S5PC100_PA_SYSCON (0xE0100000) +#define S5P_PA_SYSCON S5PC100_PA_SYSCON + +#define S5PC100_PA_OTHERS (0xE0200000) +#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) + #define S5PC100_PA_GPIO (0xE0300000) - #define S5P_PA_GPIO S5PC100_PA_GPIO + - #define S5PC100_PA_VIC0 (0xE4000000) - #define S5P_PA_VIC0 S5PC100_PA_VIC0 + #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO + #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) + + /* Interrupt */ + #define S5PC100_PA_VIC (0xE4000000) + #define S5PC100_VA_VIC S3C_VA_IRQ + #define S5PC100_PA_VIC_OFFSET 0x100000 + #define S5PC100_VA_VIC_OFFSET 0x10000 + #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) + #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) - #define S5PC100_PA_VIC1 (0xE4100000) - #define S5P_PA_VIC1 S5PC100_PA_VIC1 + #define S5PC100_PA_ONENAND (0xE7100000) - #define S5PC100_PA_VIC2 (0xE4200000) - #define S5P_PA_VIC2 S5PC100_PA_VIC2 + /* DMA */ + #define S5PC100_PA_MDMA (0xE8100000) + #define S5PC100_PA_PDMA0 (0xE9000000) + #define S5PC100_PA_PDMA1 (0xE9200000) + /* Timer */ #define S5PC100_PA_TIMER (0xEA000000) -#define S5PC1XX_PA_TIMER S5PC100_PA_TIMER -#define S5PC1XX_VA_TIMER S3C_VA_TIMER +#define S5P_PA_TIMER S5PC100_PA_TIMER -/* RTC */ -#define S5PC100_PA_RTC (0xEA300000) +#define S5PC100_PA_SYSTIMER (0xEA100000) -/* UART */ #define S5PC100_PA_UART (0xEC000000) -#define S5PC1XX_PA_UART S5PC100_PA_UART -#define S5PC1XX_VA_UART S3C_VA_UART -/* I2C */ -#define S5PC100_PA_I2C (0xEC100000) -#define S5PC100_PA_I2C1 (0xEC200000) +#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) +#define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) +#define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) +#define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) +#define S5P_SZ_UART SZ_256 + +#define S5PC100_PA_IIC0 (0xEC100000) +#define S5PC100_PA_IIC1 (0xEC200000) + +/* SPI */ +#define S5PC100_PA_SPI0 0xEC300000 +#define S5PC100_PA_SPI1 0xEC400000 +#define S5PC100_PA_SPI2 0xEC500000 /* USB HS OTG */ #define S5PC100_PA_USB_HSOTG (0xED200000) @@@ -73,18 -114,45 +101,34 @@@ /* KEYPAD */ #define S5PC100_PA_KEYPAD (0xF3100000) -/* ADC & TouchScreen */ -#define S5PC100_PA_TSADC (0xF3000000) +#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) -/* ETC */ #define S5PC100_PA_SDRAM (0x20000000) -#define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM +#define S5P_PA_SDRAM S5PC100_PA_SDRAM -/* compatibility defines. */ -#define S3C_PA_RTC S5PC100_PA_RTC +/* compatibiltiy defines. */ #define S3C_PA_UART S5PC100_PA_UART -#define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) -#define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) -#define S3C_PA_UART2 (S5PC100_PA_UART + 0x800) -#define S3C_PA_UART3 (S5PC100_PA_UART + 0xC00) -#define S3C_VA_UART0 (S3C_VA_UART + 0x0) -#define S3C_VA_UART1 (S3C_VA_UART + 0x400) -#define S3C_VA_UART2 (S3C_VA_UART + 0x800) -#define S3C_VA_UART3 (S3C_VA_UART + 0xC00) -#define S3C_UART_OFFSET 0x400 -#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) +#define S3C_PA_IIC S5PC100_PA_IIC0 +#define S3C_PA_IIC1 S5PC100_PA_IIC1 #define S3C_PA_FB S5PC100_PA_FB - #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) - #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) - #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) - - #endif /* __ASM_ARCH_MAP_H */ + #define S3C_PA_G2D S5PC100_PA_G2D + #define S3C_PA_G3D S5PC100_PA_G3D + #define S3C_PA_JPEG S5PC100_PA_JPEG + #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR + #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) + #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) + #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) + #define S3C_PA_IIC S5PC100_PA_I2C + #define S3C_PA_IIC1 S5PC100_PA_I2C1 + #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG + #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY + #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 + #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 + #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 + #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD + #define S3C_PA_TSADC S5PC100_PA_TSADC + #define S3C_PA_ONENAND S5PC100_PA_ONENAND + #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF + #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF + + #endif /* __ASM_ARCH_C100_MAP_H */ diff --cc arch/arm/mach-s5pv210/Kconfig index 96f4d9b7eab4,ef063e2890c5..0761eac9aaea --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@@ -17,51 -16,16 +17,56 @@@ config CPU_S5PV21 help Enable S5PV210 CPU support -choice - prompt "Select machine type" - depends on ARCH_S5PV210 - default MACH_SMDKV210 +config S5PV210_SETUP_I2C1 + bool + help + Common setup code for i2c bus 1. + +config S5PV210_SETUP_I2C2 + bool + help + Common setup code for i2c bus 2. + +config S5PV210_SETUP_FB_24BPP + bool + help + Common setup code for S5PV210 with an 24bpp RGB display helper. + +config S5PV210_SETUP_SDHCI + bool + select S5PV210_SETUP_SDHCI_GPIO + help + Internal helper functions for S5PV210 based SDHCI systems + +config S5PV210_SETUP_SDHCI_GPIO + bool + help + Common setup code for SDHCI gpio. + +# machine support + +config MACH_AQUILA + bool "Samsung Aquila" + select CPU_S5PV210 + select ARCH_SPARSEMEM_ENABLE + select S5PV210_SETUP_FB_24BPP + select S3C_DEV_FB + help + Machine support for the Samsung Aquila target based on S5PC110 SoC + +config MACH_GONI + bool "GONI" + select CPU_S5PV210 + select ARCH_SPARSEMEM_ENABLE + help + Machine support for Samsung GONI board + S5PC110(MCP) is one of package option of S5PV210 + config S5PC110_DEV_ONENAND + bool + help + Compile in platform device definition for OneNAND1 controller + config MACH_SMDKV210 bool "SMDKV210" select CPU_S5PV210 diff --cc arch/arm/mach-s5pv210/Makefile index 6a6dea19dec5,610b9496c186..30be9a6a4620 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@@ -25,10 -23,4 +25,11 @@@ obj-$(CONFIG_MACH_GONI) += mach-goni. # device support obj-y += dev-audio.o -obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o +obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o ++obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o + +obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o +obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o +obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o +obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o diff --cc arch/arm/plat-samsung/Makefile index d73ee553b46e,595d86b8b893..d98316b30c26 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@@ -41,8 -40,8 +41,9 @@@ obj-$(CONFIG_S3C_DEV_FB) += dev-fb. obj-y += dev-uart.o obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o +obj-$(CONFIG_S3C_DEV_WDT) += dev-wdt.o obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o + obj-$(CONFIG_S3C_DEV_ONENAND) += dev-onenand.o obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o