From: Paul Burton Date: Sun, 24 May 2015 15:11:32 +0000 (+0100) Subject: MIPS: JZ4740: Call jz4740_clock_init earlier X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1f4b840983ffbd7053b5c2219deaf62b4b8a3c12;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git MIPS: JZ4740: Call jz4740_clock_init earlier Call jz4740_clock_init before any uses of jz4740_clock_bdata occur. This is in preparation for replacing uses of that struct with calls to clk_get_rate, which will allow the clocks to be migrated towards common clock framework & devicetree. Signed-off-by: Paul Burton Cc: Lars-Peter Clausen Cc: linux-mips@linux-mips.org Cc: Deng-Cheng Zhu Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10148/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/include/asm/mach-jz4740/clock.h b/arch/mips/include/asm/mach-jz4740/clock.h index 16659cd76d4e..01d846845f53 100644 --- a/arch/mips/include/asm/mach-jz4740/clock.h +++ b/arch/mips/include/asm/mach-jz4740/clock.h @@ -20,6 +20,8 @@ enum jz4740_wait_mode { JZ4740_WAIT_MODE_SLEEP, }; +int jz4740_clock_init(void); + void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode); void jz4740_clock_udc_enable_auto_suspend(void); diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c index 1b5f55426cad..c257073577a2 100644 --- a/arch/mips/jz4740/clock.c +++ b/arch/mips/jz4740/clock.c @@ -889,7 +889,7 @@ void jz4740_clock_resume(void) JZ_CLOCK_GATE_TCU | JZ_CLOCK_GATE_DMAC | JZ_CLOCK_GATE_UART0); } -static int jz4740_clock_init(void) +int jz4740_clock_init(void) { uint32_t val; @@ -921,4 +921,3 @@ static int jz4740_clock_init(void) return 0; } -arch_initcall(jz4740_clock_init); diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c index 72b0cecbc17c..78ed7652ef67 100644 --- a/arch/mips/jz4740/time.c +++ b/arch/mips/jz4740/time.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -115,6 +116,7 @@ void __init plat_time_init(void) uint32_t clk_rate; uint16_t ctrl; + jz4740_clock_init(); jz4740_timer_init(); clk_rate = jz4740_clock_bdata.ext_rate >> 4;