From: Ben Skeggs Date: Thu, 28 Nov 2013 02:37:56 +0000 (+1000) Subject: drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1e1d6b4c530350802a3aacd2a702631cef66fcaa;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR Signed-off-by: Ben Skeggs --- diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c index 409c74e6ed77..ee8ac5ba22c8 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c @@ -105,5 +105,9 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts) ram->mr[7] |= (vr & 0x01) << 8; ram->mr[7] |= (vh & 0x01) << 7; ram->mr[7] |= (lf & 0x01) << 3; + + ram->mr[8] &= ~0x003; + ram->mr[8] |= (WR & 0x10) >> 3; + ram->mr[8] |= (CL & 0x10) >> 4; return 0; }