From: Stefan Richter Date: Sun, 14 Feb 2010 17:47:07 +0000 (+0100) Subject: firewire: ohci: enable cycle timer fix on ALi and NEC controllers X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1c1517efe173599ca2f1526ce7a04521cd424a9f;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git firewire: ohci: enable cycle timer fix on ALi and NEC controllers Discussed in "read_cycle_timer backwards for sub-cycle 0000, 0001", http://thread.gmane.org/gmane.linux.kernel.firewire.devel/13704 Known bad controllers: ALi M5271, listed by lspci as M5253 [10b9:5253] NEC OrangeLink [1033:00cd] (rev 03) NEC uPD72874 [1033:00f2] (rev 01) VIA VT6306 [1106:3044] (rev 46) VIA VT6308P, listed by lspci as rev c0 Reported-by: Pieter Palmers Reported-by: Håkan Johansson Reported-by: Clemens Ladisch Signed-off-by: Stefan Richter --- diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index d6ba897b2197..bf5e11284421 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c @@ -1817,13 +1817,14 @@ static u64 ohci_get_bus_time(struct fw_card *card) c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); } else { /* - * VIA controllers have two bugs when updating the iso cycle - * timer register: - * 1) When the lowest six bits are wrapping around to zero, + * Some controllers exhibit one or more of the following bugs + * when updating the iso cycle timer register: + * - When the lowest six bits are wrapping around to zero, * a read that happens at the same time will return garbage * in the lowest ten bits. - * 2) When the cycleOffset field wraps around to zero, the + * - When the cycleOffset field wraps around to zero, the * cycleCount field is not incremented for about 60 ns. + * - Occasionally, the entire register reads zero. * * To catch these, we read the register three times and ensure * that the difference between each two consecutive reads is @@ -2542,7 +2543,9 @@ static int __devinit pci_probe(struct pci_dev *dev, #endif ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI; - ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_VIA; + ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_AL || + dev->vendor == PCI_VENDOR_ID_NEC || + dev->vendor == PCI_VENDOR_ID_VIA; ar_context_init(&ohci->ar_request_ctx, ohci, OHCI1394_AsReqRcvContextControlSet);