From: Kyle McMartin Date: Thu, 20 Apr 2006 21:16:32 +0000 (+0000) Subject: [PARISC] Make ioremap default to _nocache X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1b52d7c2210b9a64c5cba6aded478c8217a8853c;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git [PARISC] Make ioremap default to _nocache Since it is way more work to change most drivers to comply with parisc, take the easy way out and make ioremap _NO_CACHE by default. This is in line with what powerpc does. Signed-off-by: Kyle McMartin --- diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index 29da31194b91..244f6b8883f4 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h @@ -126,24 +126,17 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr) extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); -extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) -{ - return __ioremap(offset, size, 0); -} - -/* - * This one maps high address device memory and turns off caching for that area. - * it's useful if some control registers are in such an area and write combining - * or read caching is not desirable: +/* Most machines react poorly to I/O-space being cacheable... Instead let's + * define ioremap() in terms of ioremap_nocache(). */ -extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) +extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) { - return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */); + return __ioremap(offset, size, _PAGE_NO_CACHE); } +#define ioremap_nocache(off, sz) ioremap((off), (sz)) extern void iounmap(void __iomem *addr); - static inline unsigned char __raw_readb(const volatile void __iomem *addr) { return (*(volatile unsigned char __force *) (addr));