From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 16 Mar 2017 19:34:51 +0000 (-0500)
Subject: PCI: dwc: Fix uninitialized variable in dw_handle_msi_irq()
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1b497e6493c49bbb55c89f53562f7f853495e90d;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

PCI: dwc: Fix uninitialized variable in dw_handle_msi_irq()

The bug is that "val" is unsigned long but we only initialize 32 bits of
it.  Then we test "if (val)" and that might be true not because we set the
bits but because some were never initialized.

Fixes: f342d940ee0e ("PCI: exynos: Add support for MSI")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 6cdd41f06dea..aece2962defc 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -56,19 +56,20 @@ static struct irq_chip dw_msi_irq_chip = {
 /* MSI int handler */
 irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
 {
-	unsigned long val;
+	u32 val;
 	int i, pos, irq;
 	irqreturn_t ret = IRQ_NONE;
 
 	for (i = 0; i < MAX_MSI_CTRLS; i++) {
 		dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4,
-				    (u32 *)&val);
+				    &val);
 		if (!val)
 			continue;
 
 		ret = IRQ_HANDLED;
 		pos = 0;
-		while ((pos = find_next_bit(&val, 32, pos)) != 32) {
+		while ((pos = find_next_bit((unsigned long *) &val, 32,
+					    pos)) != 32) {
 			irq = irq_find_mapping(pp->irq_domain, i * 32 + pos);
 			dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12,
 					    4, 1 << pos);