From: Matt Porter <mporter@linaro.org> Date: Mon, 3 Feb 2014 15:29:09 +0000 (-0500) Subject: usb: gadget: s3c-hsotg: fix build on x86 and other architectures X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1a7ed5bec407478b9ce5e3267708110277851614;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git usb: gadget: s3c-hsotg: fix build on x86 and other architectures The readsl and writesl I/O accessors are only defined on some architectures. The driver currently depends on CONFIG_ARM because the build breaks on x86, in particular. Switch to use of ioread32_rep and iowrite32_rep to fix build on all architectures and remove the CONFIG_ARM dependency. Also update printk formatting to handle a long long dma_addr_t to avoid warnings on !32-bit architectures. Signed-off-by: Matt Porter <mporter@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com> --- diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 42f017afd366..3557c7e5040d 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -301,7 +301,6 @@ config USB_PXA27X gadget drivers to also be dynamically linked. config USB_S3C_HSOTG - depends on ARM tristate "Designware/S3C HS/OtG USB Device controller" help The Designware USB2.0 high-speed gadget controller diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c index 1172eaeddd85..0449b768ac08 100644 --- a/drivers/usb/gadget/s3c-hsotg.c +++ b/drivers/usb/gadget/s3c-hsotg.c @@ -617,7 +617,7 @@ static int s3c_hsotg_write_fifo(struct s3c_hsotg *hsotg, to_write = DIV_ROUND_UP(to_write, 4); data = hs_req->req.buf + buf_pos; - writesl(hsotg->regs + EPFIFO(hs_ep->index), data, to_write); + iowrite32_rep(hsotg->regs + EPFIFO(hs_ep->index), data, to_write); return (to_write >= can_write) ? -ENOSPC : 0; } @@ -720,8 +720,8 @@ static void s3c_hsotg_start_req(struct s3c_hsotg *hsotg, ureq->length, ureq->actual); if (0) dev_dbg(hsotg->dev, - "REQ buf %p len %d dma 0x%08x noi=%d zp=%d snok=%d\n", - ureq->buf, length, ureq->dma, + "REQ buf %p len %d dma 0x%08llx noi=%d zp=%d snok=%d\n", + ureq->buf, length, (unsigned long long)ureq->dma, ureq->no_interrupt, ureq->zero, ureq->short_not_ok); maxreq = get_ep_limit(hs_ep); @@ -789,8 +789,8 @@ static void s3c_hsotg_start_req(struct s3c_hsotg *hsotg, dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index); writel(ureq->dma, hsotg->regs + dma_reg); - dev_dbg(hsotg->dev, "%s: 0x%08x => 0x%08x\n", - __func__, ureq->dma, dma_reg); + dev_dbg(hsotg->dev, "%s: 0x%08llx => 0x%08x\n", + __func__, (unsigned long long)ureq->dma, dma_reg); } ctrl |= DxEPCTL_EPEna; /* ensure ep enabled */ @@ -1488,7 +1488,7 @@ static void s3c_hsotg_rx_data(struct s3c_hsotg *hsotg, int ep_idx, int size) * note, we might over-write the buffer end by 3 bytes depending on * alignment of the data. */ - readsl(fifo, hs_req->req.buf + read_ptr, to_read); + ioread32_rep(fifo, hs_req->req.buf + read_ptr, to_read); } /**