From: Vignesh R Date: Fri, 11 Dec 2015 04:09:59 +0000 (+0530) Subject: ARM: dts: DRA7: add entry for qspi mmap region X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=1929d0b5a821ed5bec3d1e683e63851fc51d05ee;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git ARM: dts: DRA7: add entry for qspi mmap region Add qspi memory mapped region entries for DRA7xx based SoCs. Also, update the binding documents for the controller to document this change. Signed-off-by: Vignesh R Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 601a360531a5..809c3f334316 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -15,6 +15,10 @@ Recommended properties: - spi-max-frequency: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt +Optional properties: +- syscon-chipselects: Handle to system control region contains QSPI + chipselect register and offset of that register. + Example: qspi: qspi@4b300000 { @@ -26,3 +30,16 @@ qspi: qspi@4b300000 { spi-max-frequency = <25000000>; ti,hwmods = "qspi"; }; + +For dra7xx: +qspi: qspi@4b300000 { + compatible = "ti,dra7xxx-qspi"; + reg = <0x4b300000 0x100>, + <0x5c000000 0x4000000>, + reg-names = "qspi_base", "qspi_mmap"; + syscon-chipselects = <&scm_conf 0x558>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <48000000>; + ti,hwmods = "qspi"; +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index b2badf9110f7..bf5dd1e9508a 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1154,8 +1154,10 @@ qspi: qspi@4b300000 { compatible = "ti,dra7xxx-qspi"; - reg = <0x4b300000 0x100>; - reg-names = "qspi_base"; + reg = <0x4b300000 0x100>, + <0x5c000000 0x4000000>; + reg-names = "qspi_base", "qspi_mmap"; + syscon-chipselects = <&scm_conf 0x558>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "qspi";