From: Dave Airlie <airlied@redhat.com>
Date: Wed, 27 Jul 2016 19:51:39 +0000 (+1000)
Subject: Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm... 
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=162b20d2f9ef9dfa833cc329b1e8957beb672349;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more patches for 4.8.  Mostly bug fixes and some prep work
for iceland powerplay support.  I have a couple polaris patches and
Edward's misc cleanups that require a merge with Linus'.  I don't know
if you are planning a merge anytime soon.

[airlied: fixed up endian vs 32-bit change in ppatomctrl]

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to fix the build
  drm/amdgpu: temporary comment out unused static const structures to fix the build
  drm/amdgpu: S3 resume fail on Polaris10
  drm/amd/powerplay: add pp_tables_get_response_times function in process pptables
  drm/amd/powerplay: fix the incorrect return value
  drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrl
  drm/amdgpu: add new definitions into ppsmc.h for iceland
  drm/amd/powerplay: add SMU register macro for future use
  drm/amdgpu: add ucode_start_address into cgs_firmware_info
  drm/amdgpu: no need load microcode at sdma if powerplay is enabled
  drm/amdgpu: rename smumgr to smum for dpm
  drm/amdgpu: disable GFX PG on CZ/BR/ST
  drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variable
  drm/amdgpu: return -ENOSPC when running out of UVD handles
  drm/amdgpu: trace need_flush in grab_vm as well
  drm/amdgpu: always signal all fences
  drm/amdgpu: check flush fence context instead of same ring v2
  drm/radeon: support backlight control for UNIPHY3
  drm/amdgpu: support backlight control for UNIPHY3
  drm/amdgpu: remove usec timeout loop from IB tests
  ...
---

162b20d2f9ef9dfa833cc329b1e8957beb672349
diff --cc drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
index a6c9b4201e25,57a13b1c171a..d1b528b401e9
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
@@@ -1877,13 -1853,9 +1877,10 @@@ static int polaris10_populate_clock_str
  		data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;
  	}
  
 +	data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6;
  	/* Populate CKS Lookup Table */
- 	if (stretch_amount == 1 || stretch_amount == 2 || stretch_amount == 5)
- 		stretch_amount2 = 0;
- 	else if (stretch_amount == 3 || stretch_amount == 4)
- 		stretch_amount2 = 1;
- 	else {
+ 	if (stretch_amount != 1 && stretch_amount != 2 && stretch_amount != 3 &&
+ 			stretch_amount != 4 && stretch_amount != 5) {
  		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
  				PHM_PlatformCaps_ClockStretcher);
  		PP_ASSERT_WITH_CODE(false,
diff --cc drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
index a64db7ba4e0b,0f5c9d09641b..e2aece361eb0
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
@@@ -1274,7 -1321,7 +1321,7 @@@ int atomctrl_get_voltage_evv_on_sclk_ai
  	if (0 != result)
  		return result;
  
- 	*voltage = ((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel;
 -	*voltage = le16_to_cpu(get_voltage_info_param_space.usVoltageLevel);
++	*voltage = le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel);
  
  	return result;
  }