From: Atsushi Nemoto Date: Fri, 4 Sep 2009 13:09:04 +0000 (+0900) Subject: MIPS: TXx9: Disable PM capability of TX493[89] internal ether X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=13680ade4e57090a8ccad332e84e1f3d48b67125;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git MIPS: TXx9: Disable PM capability of TX493[89] internal ether Some TC35815 variants (i.e. TX493[89] internal ether) report existance of PM registers though they are not supported. Disable PM features by clearing pdev->pm_cap. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c index 7b637a7c0e66..707cfa9c547d 100644 --- a/arch/mips/txx9/generic/pci.c +++ b/arch/mips/txx9/generic/pci.c @@ -341,6 +341,15 @@ static void quirk_slc90e66_ide(struct pci_dev *dev) } #endif /* CONFIG_TOSHIBA_FPCIB0 */ +static void tc35815_fixup(struct pci_dev *dev) +{ + /* This device may have PM registers but not they are not suported. */ + if (dev->pm_cap) { + dev_info(&dev->dev, "PM disabled\n"); + dev->pm_cap = 0; + } +} + static void final_fixup(struct pci_dev *dev) { unsigned char bist; @@ -374,6 +383,10 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, quirk_slc90e66_ide); #endif +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TOSHIBA_2, + PCI_DEVICE_ID_TOSHIBA_TC35815_NWU, tc35815_fixup); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TOSHIBA_2, + PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939, tc35815_fixup); DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup); DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup);