From: Will Deacon Date: Tue, 6 Oct 2015 17:46:30 +0000 (+0100) Subject: arm64: mm: remove dsb from update_mmu_cache X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=120798d2e7d1ac87365fe5ea91b074bb42ca1eff;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git arm64: mm: remove dsb from update_mmu_cache update_mmu_cache() consists of a dsb(ishst) instruction so that new user mappings are guaranteed to be visible to the page table walker on exception return. In reality this can be a very expensive operation which is rarely needed. Removing this barrier shows a modest improvement in hackbench scores and , in the worst case, we re-take the user fault and establish that there was nothing to do. Reviewed-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas --- diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 581d1406ba28..5043a84e724e 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -646,10 +646,10 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { /* - * set_pte() does not have a DSB for user mappings, so make sure that - * the page table write is visible. + * We don't do anything here, so there's a very small chance of + * us retaking a user fault which we just fixed up. The alternative + * is doing a dsb(ishst), but that penalises the fastpath. */ - dsb(ishst); } #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)