From: Jani Nikula Date: Fri, 1 Apr 2016 07:44:41 +0000 (+0300) Subject: drm/i915: use for_each_port_masked in bxt phy init for clarity X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=11b538cd6df398c86f4f0e09049c41e3058af10d;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: use for_each_port_masked in bxt phy init for clarity Make it easier to see which ports are configured for each phy. No functional changes. Signed-off-by: Jani Nikula Reviewed-by: Ander Conselvan de Oliveira Signed-off-by: Imre Deak Link: http://patchwork.freedesktop.org/patch/msgid/1459496681-398-1-git-send-email-jani.nikula@intel.com --- diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 3d62b601188f..2758622a5c2d 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1726,7 +1726,7 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy) { enum port port; - uint32_t val; + u32 ports, val; val = I915_READ(BXT_P_CR_GT_DISP_PWRON); val |= GT_DISPLAY_POWER_ON(phy); @@ -1745,8 +1745,12 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, DRM_ERROR("timeout during PHY%d power on\n", phy); } - for (port = (phy == DPIO_PHY0 ? PORT_B : PORT_A); - port <= (phy == DPIO_PHY0 ? PORT_C : PORT_A); port++) { + if (phy == DPIO_PHY0) + ports = BIT(PORT_B) | BIT(PORT_C); + else + ports = BIT(PORT_A); + + for_each_port_masked(port, ports) { int lane; for (lane = 0; lane < 4; lane++) {