From: Eric Huang <JinHuiEric.Huang@amd.com>
Date: Tue, 24 Nov 2015 15:53:27 +0000 (-0500)
Subject: drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=0bbb81761864c63b5f323b61b48ee892d472c880;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 67845ee644ad..652e76644c31 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1442,7 +1442,8 @@ static int vi_common_early_init(void *handle)
 		break;
 	case CHIP_FIJI:
 		adev->has_uvd = true;
-		adev->cg_flags = 0;
+		adev->cg_flags = AMDGPU_CG_SUPPORT_UVD_MGCG |
+				AMDGPU_CG_SUPPORT_VCE_MGCG;
 		adev->pg_flags = 0;
 		adev->external_rev_id = adev->rev_id + 0x3c;
 		break;