From: Benjamin Herrenschmidt Date: Wed, 17 Oct 2007 04:26:50 +0000 (+1000) Subject: [POWERPC] Fix 64 bits vDSO DWARF info for CR register X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=081c11a5d0cc24ab58adc7de2ddf209149bf176f;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git [POWERPC] Fix 64 bits vDSO DWARF info for CR register The current DWARF info for CR are incorrect, causing the gcc unwinder to go to lunch if we take a segfault in the vdso. This fixes it. Problem identified by Andrew Haley, and fix provided by Jakub Jelinek (thanks !). Unfortunately, a bug in gcc cause it to not quite work either, but that is being fixed separately with something around the lines of: linux-unwind.h: fs->regs.reg[R_CR2].loc.offset = (long) ®s->ccr - new_cfa; + /* CR? regs are just 32-bit and PPC is big-endian. */ + fs->regs.reg[R_CR2].loc.offset += sizeof (long) - 4; (According to Jakub) Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- diff --git a/arch/powerpc/kernel/vdso64/sigtramp.S b/arch/powerpc/kernel/vdso64/sigtramp.S index 17a83fa6dc52..59eb59bb4082 100644 --- a/arch/powerpc/kernel/vdso64/sigtramp.S +++ b/arch/powerpc/kernel/vdso64/sigtramp.S @@ -134,13 +134,16 @@ V_FUNCTION_END(__kernel_sigtramp_rt64) 9: /* This is where the pt_regs pointer can be found on the stack. */ -#define PTREGS 128+168+56 +#define PTREGS 128+168+56 /* Size of regs. */ -#define RSIZE 8 +#define RSIZE 8 + +/* Size of CR reg in DWARF unwind info. */ +#define CRSIZE 4 /* This is the offset of the VMX reg pointer. */ -#define VREGS 48*RSIZE+33*8 +#define VREGS 48*RSIZE+33*8 /* Describe where general purpose regs are saved. */ #define EH_FRAME_GEN \ @@ -178,7 +181,7 @@ V_FUNCTION_END(__kernel_sigtramp_rt64) rsave (31, 31*RSIZE); \ rsave (67, 32*RSIZE); /* ap, used as temp for nip */ \ rsave (65, 36*RSIZE); /* lr */ \ - rsave (70, 38*RSIZE) /* cr */ + rsave (70, 38*RSIZE + (RSIZE - CRSIZE)) /* cr */ /* Describe where the FP regs are saved. */ #define EH_FRAME_FP \