From: Leonid Yegoshin Date: Wed, 4 Dec 2013 16:39:34 +0000 (+0000) Subject: MIPS: traps: Set correct address limit for breakpoints and traps X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=078dde5e21dba9f4186ebfc2aef06341fd20efb4;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git MIPS: traps: Set correct address limit for breakpoints and traps When a breakpoint or trap happens when operating in kernel mode but on users behalf (eg syscall) it is necessary to change the address limit to KERNEL_DS so any address checking can be bypassed and print the correct stack trace. Signed-off-by: Leonid Yegoshin Signed-off-by: Markos Chandras --- diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 1a76d114e84b..074e857ced28 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -865,6 +865,11 @@ asmlinkage void do_bp(struct pt_regs *regs) enum ctx_state prev_state; unsigned long epc; u16 instr[2]; + mm_segment_t seg; + + seg = get_fs(); + if (!user_mode(regs)) + set_fs(KERNEL_DS); prev_state = exception_enter(); if (get_isa16_mode(regs->cp0_epc)) { @@ -924,6 +929,7 @@ asmlinkage void do_bp(struct pt_regs *regs) do_trap_or_bp(regs, bcode, "Break"); out: + set_fs(seg); exception_exit(prev_state); return; @@ -937,8 +943,13 @@ asmlinkage void do_tr(struct pt_regs *regs) u32 opcode, tcode = 0; enum ctx_state prev_state; u16 instr[2]; + mm_segment_t seg; unsigned long epc = msk_isa16_mode(exception_epc(regs)); + seg = get_fs(); + if (!user_mode(regs)) + set_fs(get_ds()); + prev_state = exception_enter(); if (get_isa16_mode(regs->cp0_epc)) { if (__get_user(instr[0], (u16 __user *)(epc + 0)) || @@ -959,6 +970,7 @@ asmlinkage void do_tr(struct pt_regs *regs) do_trap_or_bp(regs, tcode, "Trap"); out: + set_fs(seg); exception_exit(prev_state); return;