From: Chris Wilson Date: Fri, 18 Nov 2016 21:17:47 +0000 (+0000) Subject: drm/i915: Skip final clflush if LLC is coherent X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=05c348377d90483f63362af3dc980d30fdc777be;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: Skip final clflush if LLC is coherent If the LLC is coherent with the object, we do not need to worry about whether main memory and cache mismatch when we hand the object back to the system. Signed-off-by: Chris Wilson Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/20161118211747.25197-2-chris@chris-wilson.co.uk --- diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b6ad1bae5a15..902fa427c196 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -229,7 +229,8 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object *obj, if (obj->mm.madv == I915_MADV_DONTNEED) obj->mm.dirty = false; - if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) + if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 && + !cpu_cache_is_coherent(obj->base.dev, obj->cache_level)) drm_clflush_sg(pages); obj->base.read_domains = I915_GEM_DOMAIN_CPU;