From: Ondrej Zajicek Date: Tue, 8 May 2007 07:39:41 +0000 (-0700) Subject: vga: vgastate fix X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=0449359f053829ec89c026b5fb80bbe7190a5fe8;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git vga: vgastate fix 1) sets 'palette access disabled' during read from AR10. This is usually documented as needed for access AR01-AR0F, but on ARK Logic card it is needed for AR10 (otherwise read returns some nonsence and save_vga_text() returns before do anything). 2) do not restore AR10, because it was not changed during 3) remove modification of misc reg: /* force graphics mode */ vga_w(state->vgabase, VGA_MIS_W, misc | 1); as comment is misleading - LSB of misc reg does not set/reset graphics mode, but set color/mono adresses of CRT and some other regs. but these regs are not used during save/restore fonts. (it worked even when (misc | 1) was replaced by (misc & ~1) ). Signed-off-by: Ondrej Zajicek Signed-off-by: Antonino Daplas Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/video/vgastate.c b/drivers/video/vgastate.c index d94efafc77b5..b91c466225b9 100644 --- a/drivers/video/vgastate.c +++ b/drivers/video/vgastate.c @@ -50,23 +50,28 @@ static void save_vga_text(struct vgastate *state, void __iomem *fbbase) struct regstate *saved = (struct regstate *) state->vidstate; int i; u8 misc, attr10, gr4, gr5, gr6, seq1, seq2, seq4; + unsigned short iobase; /* if in graphics mode, no need to save */ + misc = vga_r(state->vgabase, VGA_MIS_R); + iobase = (misc & 1) ? 0x3d0 : 0x3b0; + + vga_r(state->vgabase, iobase + 0xa); + vga_w(state->vgabase, VGA_ATT_W, 0x00); attr10 = vga_rattr(state->vgabase, 0x10); + vga_r(state->vgabase, iobase + 0xa); + vga_w(state->vgabase, VGA_ATT_W, 0x20); + if (attr10 & 1) return; - + /* save regs */ - misc = vga_r(state->vgabase, VGA_MIS_R); gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ); gr5 = vga_rgfx(state->vgabase, VGA_GFX_MODE); gr6 = vga_rgfx(state->vgabase, VGA_GFX_MISC); seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE); seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE); - /* force graphics mode */ - vga_w(state->vgabase, VGA_MIS_W, misc | 1); - /* blank screen */ seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE); vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); @@ -115,15 +120,12 @@ static void save_vga_text(struct vgastate *state, void __iomem *fbbase) } /* restore regs */ - vga_wattr(state->vgabase, 0x10, attr10); - vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, seq2); vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, seq4); vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4); vga_wgfx(state->vgabase, VGA_GFX_MODE, gr5); vga_wgfx(state->vgabase, VGA_GFX_MISC, gr6); - vga_w(state->vgabase, VGA_MIS_W, misc); /* unblank screen */ vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); @@ -137,11 +139,10 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase) { struct regstate *saved = (struct regstate *) state->vidstate; int i; - u8 misc, gr1, gr3, gr4, gr5, gr6, gr8; + u8 gr1, gr3, gr4, gr5, gr6, gr8; u8 seq1, seq2, seq4; /* save regs */ - misc = vga_r(state->vgabase, VGA_MIS_R); gr1 = vga_rgfx(state->vgabase, VGA_GFX_SR_ENABLE); gr3 = vga_rgfx(state->vgabase, VGA_GFX_DATA_ROTATE); gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ); @@ -151,9 +152,6 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase) seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE); seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE); - /* force graphics mode */ - vga_w(state->vgabase, VGA_MIS_W, misc | 1); - /* blank screen */ seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE); vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); @@ -213,8 +211,6 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase) vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x3); /* restore regs */ - vga_w(state->vgabase, VGA_MIS_W, misc); - vga_wgfx(state->vgabase, VGA_GFX_SR_ENABLE, gr1); vga_wgfx(state->vgabase, VGA_GFX_DATA_ROTATE, gr3); vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4);