From: Mika Kuoppala Date: Thu, 6 Aug 2015 14:09:17 +0000 (+0300) Subject: drm/i915: Check idle to active before processing CSQ X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=031a8936dc660e7ae2485eb7493eba1876cf25fe;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: Check idle to active before processing CSQ If idle to active bit is set, the rest of the fields in CSQ are not valid. Bail out early if this is the case in order to prevent rest of the loop inspecting stale values. This was found by Bspec/code inspection. Doesn't seem to fix any of the known issues. Signed-off-by: Mika Kuoppala Reviewed-by: Arun Siluvery [danvet: Add note about how this was found.] Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 29347e7a9565..5bc0ce1347ce 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -497,6 +497,9 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring) status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + (read_pointer % 6) * 8 + 4); + if (status & GEN8_CTX_STATUS_IDLE_ACTIVE) + continue; + if (status & GEN8_CTX_STATUS_PREEMPTED) { if (status & GEN8_CTX_STATUS_LITE_RESTORE) { if (execlists_check_remove_request(ring, status_id))