From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Mon, 28 Aug 2017 10:52:54 +0000 (+0800)
Subject: PCI: layerscape: Move STRFMR1 access out from the DBI write-enable bracket
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=02232343349e606c8809e2555985a806d615e4ee;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

PCI: layerscape: Move STRFMR1 access out from the DBI write-enable bracket

The STRFMR1 is not a DBI read-only register, so move it out from the
write-enable bracket.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
---

diff --git a/drivers/pci/dwc/pci-layerscape.c b/drivers/pci/dwc/pci-layerscape.c
index aebefb42377a..c16940044ed6 100644
--- a/drivers/pci/dwc/pci-layerscape.c
+++ b/drivers/pci/dwc/pci-layerscape.c
@@ -162,9 +162,10 @@ static int ls_pcie_host_init(struct pcie_port *pp)
 	iowrite32(1, pci->dbi_base + PCIE_DBI_RO_WR_EN);
 	ls_pcie_fix_class(pcie);
 	ls_pcie_clear_multifunction(pcie);
-	ls_pcie_drop_msg_tlp(pcie);
 	iowrite32(0, pci->dbi_base + PCIE_DBI_RO_WR_EN);
 
+	ls_pcie_drop_msg_tlp(pcie);
+
 	dw_pcie_setup_rc(pp);
 
 	return 0;