From: Elaine Zhang Date: Fri, 1 Sep 2017 02:01:46 +0000 (+0800) Subject: clk: rockchip: add sclk_timer5 as critical clock on rk3128 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=00e6751ffc9e6e0651e514961316fd15f0409683;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git clk: rockchip: add sclk_timer5 as critical clock on rk3128 sclk_timer5 is for arm arch counter, so need always on. but no dts node to handle this clk, so make it as critical clock Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner --- diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c index ce02d2cff608..5970a50671b9 100644 --- a/drivers/clk/rockchip/clk-rk3128.c +++ b/drivers/clk/rockchip/clk-rk3128.c @@ -578,6 +578,7 @@ static const char *const rk3128_critical_clocks[] __initconst = { "hclk_peri", "pclk_peri", "pclk_pmu", + "sclk_timer5", }; static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)