From: Joerg Roedel Date: Tue, 2 Oct 2012 12:40:03 +0000 (+0200) Subject: Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', 'x86/amd',... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=009487258399cb4f431992919fa0f386d1b74ceb;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', 'x86/amd', 'x86/vt-d' and 'x86/amd-irq-remapping' into next Conflicts: drivers/iommu/amd_iommu_init.c --- 009487258399cb4f431992919fa0f386d1b74ceb diff --cc drivers/iommu/amd_iommu.c index e89daf1b21b4,6d1cbdfc9b2a,b64502dfa9f4,450b25808d98,b64502dfa9f4,b4e525908e66..55074cba20eb --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@@@@@@ -293,18 -293,11 -293,16 -293,16 -293,16 -305,16 +305,18 @@@@@@@ static int iommu_init_device(struct dev dev_data->alias_data = alias_data; dma_pdev = pci_get_bus_and_slot(alias >> 8, alias & 0xff); ----- } else +++++ } +++++ +++++ if (dma_pdev == NULL) dma_pdev = pci_dev_get(pdev); + /* Account for quirked devices */ swap_pci_ref(&dma_pdev, pci_get_dma_source(dma_pdev)); + /* + * If it's a multifunction device that does not support our + * required ACS flags, add to the same group as function 0. + */ if (dma_pdev->multifunction && !pci_acs_enabled(dma_pdev, REQ_ACS_FLAGS)) swap_pci_ref(&dma_pdev, diff --cc drivers/iommu/amd_iommu_init.c index 18a89b760aaa,500e7f15f5c2,18a89b760aaa,1772b3cbebf4,18a89b760aaa,3d6e7c5471f2..18b0d99bd4d6 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@@@@@@ -177,8 -177,8 -177,8 -176,8 -177,8 -185,14 +184,14 @@@@@@@ u16 *amd_iommu_alias_table */ struct amd_iommu **amd_iommu_rlookup_table; + /* --- - * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap +++++ * This table is used to find the irq remapping table for a given device id +++++ * quickly. +++++ */ +++++ struct irq_remap_table **irq_lookup_table; +++++ +++ + /* - * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap +++ ++ * AMD IOMMU allows up to 2^16 different protection domains. This is a bitmap * to know which ones are already in use. */ unsigned long *amd_iommu_pd_alloc_bitmap; @@@@@@@ -690,8 -690,8 -690,8 -689,8 -690,8 -704,33 +703,33 @@@@@@@ static void __init set_dev_entry_from_a set_iommu_for_device(iommu, devid); } +++++ static int add_special_device(u8 type, u8 id, u16 devid) +++++ { +++++ struct devid_map *entry; +++++ struct list_head *list; +++++ +++++ if (type != IVHD_SPECIAL_IOAPIC && type != IVHD_SPECIAL_HPET) +++++ return -EINVAL; +++++ +++++ entry = kzalloc(sizeof(*entry), GFP_KERNEL); +++++ if (!entry) +++++ return -ENOMEM; +++++ +++++ entry->id = id; +++++ entry->devid = devid; +++++ +++++ if (type == IVHD_SPECIAL_IOAPIC) +++++ list = &ioapic_map; +++++ else +++++ list = &hpet_map; +++++ +++++ list_add_tail(&entry->list, list); +++++ +++++ return 0; +++++ } +++++ /* --- -- * Reads the device exclusion range from ACPI and initialize IOMMU with +++ ++ * Reads the device exclusion range from ACPI and initializes the IOMMU with * it */ static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) @@@@@@@ -1115,9 -1115,9 -1115,9 -1114,9 -1115,9 -1196,11 +1195,11 @@@@@@@ static void print_iommu_info(void if (iommu_feature(iommu, (1ULL << i))) pr_cont(" %s", feat_str[i]); } --- -- } pr_cont("\n"); +++ ++ } } +++++ if (irq_remapping_enabled) +++++ pr_info("AMD-Vi: Interrupt remapping enabled\n"); } static int __init amd_iommu_init_pci(void) @@@@@@@ -1649,9 -1652,6 -1649,9 -1648,9 -1649,9 -1804,12 +1803,12 @@@@@@@ static bool detect_ivrs(void early_acpi_os_unmap_memory((char __iomem *)ivrs_base, ivrs_size); + /* Make sure ACS will be enabled during PCI probe */ + pci_request_acs(); + +++++ if (!disable_irq_remap) +++++ amd_iommu_irq_remap = true; +++++ return true; } @@@@@@@ -1749,7 -1749,7 -1749,7 -1748,7 -1749,7 -1913,48 +1912,48 @@@@@@@ static int __init iommu_go_to_state(enu return ret; } +++++ #ifdef CONFIG_IRQ_REMAP +++++ int __init amd_iommu_prepare(void) +++++ { +++++ return iommu_go_to_state(IOMMU_ACPI_FINISHED); +++++ } + +++ +++++ int __init amd_iommu_supported(void) +++++ { +++++ return amd_iommu_irq_remap ? 1 : 0; +++++ } +++++ +++++ int __init amd_iommu_enable(void) +++++ { +++++ int ret; +++++ +++++ ret = iommu_go_to_state(IOMMU_ENABLED); +++++ if (ret) +++++ return ret; +++++ +++++ irq_remapping_enabled = 1; +++ + +++++ return 0; +++++ } +++++ +++++ void amd_iommu_disable(void) +++++ { +++++ amd_iommu_suspend(); +++++ } +++++ +++++ int amd_iommu_reenable(int mode) +++++ { +++++ amd_iommu_resume(); +++++ +++++ return 0; +++++ } + + +++++ int __init amd_iommu_enable_faulting(void) +++++ { +++++ /* We enable MSI later when PCI is initialized */ +++++ return 0; +++++ } +++++ #endif /* * This is the core init function for AMD IOMMU hardware in the system.