__le32 sis_ctrl_to_host_doorbell; /* 9Ch */
u8 reserved3[0xa0 - (0x9c + sizeof(__le32))];
__le32 sis_ctrl_to_host_doorbell_clear; /* A0h */
- u8 reserved4[0xbc - (0xa0 + sizeof(__le32))];
+ u8 reserved4[0xb0 - (0xa0 + sizeof(__le32))];
+ __le32 sis_driver_scratch; /* B0h */
+ u8 reserved5[0xbc - (0xb0 + sizeof(__le32))];
__le32 sis_firmware_status; /* BCh */
- u8 reserved5[0x1000 - (0xbc + sizeof(__le32))];
+ u8 reserved6[0x1000 - (0xbc + sizeof(__le32))];
__le32 sis_mailbox[8]; /* 1000h */
- u8 reserved6[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
+ u8 reserved7[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
/*
* The PQI spec states that the PQI registers should be at
* offset 0 from the PCIe BAR 0. However, we can't map
struct semaphore lun_reset_sem;
};
+enum pqi_ctrl_mode {
+ UNKNOWN,
+ PQI_MODE
+};
+
/*
* assume worst case: SATA queue depth of 31 minus 4 internal firmware commands
*/
return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
}
+static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
+ struct pqi_ctrl_info *ctrl_info)
+{
+ return sis_read_driver_scratch(ctrl_info);
+}
+
+static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
+ enum pqi_ctrl_mode mode)
+{
+ sis_write_driver_scratch(ctrl_info, mode);
+}
+
#define PQI_RESCAN_WORK_INTERVAL (10 * HZ)
static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
return rc;
}
+static int pqi_kdump_init(struct pqi_ctrl_info *ctrl_info)
+{
+ if (!sis_is_firmware_running(ctrl_info))
+ return -ENXIO;
+
+ if (pqi_get_ctrl_mode(ctrl_info) == PQI_MODE) {
+ sis_disable_msix(ctrl_info);
+ if (pqi_reset(ctrl_info) == 0)
+ sis_reenable_sis_mode(ctrl_info);
+ }
+
+ return 0;
+}
+
static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
{
int rc;
+ if (reset_devices) {
+ rc = pqi_kdump_init(ctrl_info);
+ if (rc)
+ return rc;
+ }
+
/*
* When the controller comes out of reset, it is always running
* in legacy SIS mode. This is so that it can be compatible
/* From here on, we are running in PQI mode. */
ctrl_info->pqi_mode_enabled = true;
+ pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
rc = pqi_alloc_admin_queues(ctrl_info);
if (rc) {
sis_ctrl_to_host_doorbell) != 0x9c);
BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
sis_ctrl_to_host_doorbell_clear) != 0xa0);
+ BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
+ sis_driver_scratch) != 0xb0);
BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
sis_firmware_status) != 0xbc);
BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
return rc;
}
+void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value)
+{
+ writel(value, &ctrl_info->registers->sis_driver_scratch);
+}
+
+u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info)
+{
+ return readl(&ctrl_info->registers->sis_driver_scratch);
+}
+
static void __attribute__((unused)) verify_structures(void)
{
BUILD_BUG_ON(offsetof(struct sis_base_struct,
void sis_disable_msix(struct pqi_ctrl_info *ctrl_info);
void sis_soft_reset(struct pqi_ctrl_info *ctrl_info);
int sis_reenable_sis_mode(struct pqi_ctrl_info *ctrl_info);
+void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value);
+u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info);
#endif /* _SMARTPQI_SIS_H */